公开(公告)号：US20230276611A1

公开(公告)日：2023-08-31

申请号：US18102897

申请日：2023-01-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sanggyo CHUNG ,  Chanmi LEE ,  Hayoung YI ,  Kwanghee CHEON ,  Seunghee HAN

IPC: H10B12/00

CPC classification number: H10B12/09 ,  H10B12/02 ,  H10B12/488

Abstract: A method of manufacturing a semiconductor device includes forming a plurality of reference patterns and a peripheral pattern on a feature layer by using a first material such that the peripheral pattern is connected to end portions of the plurality of reference patterns; forming a plurality of first spacers on both sidewalls of each of the plurality of reference patterns by using a second material; removing the plurality of reference patterns; forming a plurality of second spacers on both sidewalls of each of the plurality of first spacers by using the first material; removing the plurality of first spacers so that the plurality of second spacers and the peripheral pattern remain on the feature layer; and patterning the feature layer by using the plurality of second spacers and the peripheral pattern as an etch mask.