公开(公告)号：US20230045892A1

公开(公告)日：2023-02-16

申请号：US17969959

申请日：2022-10-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUNSOO CHO ,  DONG-MIN KIM ,  KYOUNG BACK LEE

IPC: G06F3/06

Abstract: A storage device including: a nonvolatile memory device including a first, second and third area; and a controller to receive a first write command including a first logical block address from a host, to receive first data corresponding to the first logical block address in response to the first write command, and store the first data in the nonvolatile memory device, when the first write command includes area information, the controller stores the first data in the first area or the second area based on the area information, when the first write command does not include the area information, the controller stores the first data. in the third area, each of the first area and the second area includes memory cells each storing “n” bits (n being a positive integer), and the third area includes memory cells each storing “m” bits (m being a positive integer greater than n).

公开(公告)号：US20210034300A1

公开(公告)日：2021-02-04

申请号：US16943268

申请日：2020-07-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUNSOO CHO ,  DONG-MIN KIM ,  KYOUNG BACK LEE

IPC: G06F3/06

Abstract: A storage device including: a nonvolatile memory device including a first, second and third area; and a controller to receive a first write command including a first logical block address from a host, to receive first data corresponding to the first logical block address in response to the first write command, and store the first data in the nonvolatile memory device, when the first write command includes area information, the controller stores the first data in the first area or the second area based on the area information, when the first write command does not include the area information, the controller stores the first data in the third area, each of the first area and the second area includes memory cells each storing “n” bits (n being a positive integer), and the third area includes memory cells each storing “m” bits (m being a positive integer greater than n).

公开(公告)号：US20210034514A1

公开(公告)日：2021-02-04

申请号：US16939913

申请日：2020-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： HYUNSOO CHO ,  Dong-Min Kim

IPC: G06F12/02 ,  G06F12/0871 ,  G06F12/0893 ,  G06F12/0873 ,  G06F13/16 ,  G06F9/30

Abstract: A storage device includes a nonvolatile memory device including a first region and a second region, and a controller that receives a first operation command including move attribute information and a first logical block address from an external host device and moves first data corresponding from the first region to the second region in response to the received first operation command, and when the first operation command does not include the move attribute information, the controller performs a first operation corresponding to the first operation command.

公开(公告)号：US20150032915A1

公开(公告)日：2015-01-29

申请号：US14293965

申请日：2014-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JEONG HUR ,  SANGYOON OH ,  YOUNGMOON KIM ,  JEONG-WOO PARK ,  HYUNSOO CHO

IPC: G06F5/06

CPC classification number: G06F5/06 ,  G06F3/0613 ,  G06F3/0625 ,  G06F3/0634 ,  G06F3/0656 ,  G06F3/0679 ,  Y02D10/154

Abstract: A storage system according to an exemplary embodiment of the inventive concept includes a host and a storage device. The host includes a link speed table having data transfer speed information for an application. A data transfer speed manager is configured to calculate a predetermined transfer speed based on the data transfer speed information for the application. A device driver is configured to control an operation of the storage device. A host controller is configured to change a data transfer speed of an interface based on the predetermined transfer speed provided through the device driver.

Abstract translation: 根据本发明构思的示例性实施例的存储系统包括主机和存储设备。 主机包括具有应用的数据传输速度信息的链接速度表。 数据传送速度管理器被配置为基于用于应用的数据传送速度信息来计算预定传送速度。 设备驱动器被配置为控制存储设备的操作。 主机控制器被配置为基于通过设备驱动器提供的预定传送速度来改变接口的数据传送速度。