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公开(公告)号:US10998362B2
公开(公告)日:2021-05-04
申请号:US16915274
申请日:2020-06-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae Hyun Lim , Yoon Seok Seo , Kyung Moon Jung , Eun Jin Kim
IPC: H01L27/146 , H01L31/0203 , H01L31/0232
Abstract: A fan-out sensor package includes: a substrate in which a through-hole is formed and portions of a wiring layer are exposed from an insulating layer; an image sensor having an active surface having a sensing region disposed below the through-hole of the substrate and connection pads disposed in the vicinity of the sensing region; an optical member disposed on the active surface of the image sensor; a dam member disposed in the vicinity of the sensing region; and an encapsulant encapsulating the substrate and the image sensor, wherein the third wiring layer and the connection pads are electrically connected to each other by connection members.
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公开(公告)号:US10700110B2
公开(公告)日:2020-06-30
申请号:US16132757
申请日:2018-09-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Jae Hyun Lim , Yoon Seok Seo , Kyung Moon Jung , Eun Jin Kim
IPC: H01L31/0203 , H01L27/146 , H01L31/0232
Abstract: A fan-out sensor package includes: a substrate in which a through-hole is formed and portions of a wiring layer are exposed from an insulating layer; an image sensor having an active surface having a sensing region disposed below the through-hole of the substrate and connection pads disposed in the vicinity of the sensing region; an optical member disposed on the active surface of the image sensor; a dam member disposed in the vicinity of the sensing region; and an encapsulant encapsulating the substrate and the image sensor, wherein the third wiring layer and the connection pads are electrically connected to each other by connection members.
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公开(公告)号:US10573589B2
公开(公告)日:2020-02-25
申请号:US16105289
申请日:2018-08-20
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eun Jin Kim , Han Kim
IPC: H01L23/498 , H01L23/31 , H01L23/043
Abstract: A semiconductor package includes a connection member having a first surface and a second surface disposed to oppose each other and including an insulating member having a plurality of insulating layers and a plurality of redistribution layers disposed on the plurality of insulating layers, respectively; a semiconductor chip disposed on the first surface of the connection member and having connection pads electrically connected to the plurality of redistribution layers; and an encapsulant disposed on the first surface of the connection member and encapsulating the semiconductor chip, wherein at least one of the plurality of redistribution layers includes a dummy electrode pattern in which a plurality of holes are arranged, and each of the plurality of holes has a shape including a plurality of protruding regions that protrude externally from different positions.
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