公开(公告)号：US20170250261A1

公开(公告)日：2017-08-31

申请号：US15443160

申请日：2017-02-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-woo KIM ,  Hyun-jung LEE ,  Sun-jung KIM ,  Seung-hun LEE ,  Keum-seok PARK ,  Edward Namkyu CHO

IPC: H01L29/49 ,  H01L29/66 ,  H01L29/786 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/66742 ,  B82Y10/00 ,  H01L29/0653 ,  H01L29/0673 ,  H01L29/1037 ,  H01L29/1079 ,  H01L29/41725 ,  H01L29/42392 ,  H01L29/515 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78618 ,  H01L29/78696

Abstract: A semiconductor device includes a fin-type active area, nanosheets, a gate, a source/drain region, and insulating spacers. The fin-type active area protrudes from a substrate in a first direction. The nanosheets are spaced from an upper surface of the fin-type active area and include channel regions. The gate is over the fin-type active area. The source/drain region is connected to the nanosheets. The insulating spacers are in the fin-type active area and between the nanosheets. Air spaces are between the insulating spacers and the source/drain region based on positions of the insulating spacers.

公开(公告)号：US20210408237A1

公开(公告)日：2021-12-30

申请号：US17470288

申请日：2021-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Cho-eun LEE ,  Seok-hoon KIM ,  Sang-gil LEE ,  Edward Namkyu CHO ,  Min-hee CHOI ,  Seung-hun LEE

IPC: H01L29/08 ,  H01L29/78 ,  H01L21/8238 ,  H01L21/8234

Abstract: A semiconductor device includes: a fin-type active region extending on a substrate in a first direction that is parallel to an upper surface of the substrate; and a source/drain region in a recess region extending into the fin-type active region, wherein the source/drain region includes: a first source/drain material layer; a second source/drain material layer on the first source/drain material layer; and a first dopant diffusion barrier layer on an interface between the first source/drain material layer and the second source/drain material layer.

公开(公告)号：US20200020773A1

公开(公告)日：2020-01-16

申请号：US16452668

申请日：2019-06-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Hee CHOI ,  Seokhoon KIM ,  Choeun LEE ,  Edward Namkyu CHO ,  Seung Hun LEE

IPC: H01L29/08 ,  H01L27/11 ,  H01L27/092 ,  H01L21/8238 ,  H01L29/417 ,  H01L29/78

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.

公开(公告)号：US20220190112A1

公开(公告)日：2022-06-16

申请号：US17686700

申请日：2022-03-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Min-Hee CHOI ,  Seokhoon KIM ,  Choeun LEE ,  Edward Namkyu CHO ,  Seung Hun LEE

IPC: H01L29/08 ,  H01L27/11 ,  H01L27/092 ,  H01L29/78 ,  H01L21/8238 ,  H01L29/417 ,  H01L27/108

Abstract: A semiconductor device including a substrate including an active pattern; a gate electrode crossing the active pattern; a source/drain pattern adjacent to one side of the gate electrode and on an upper portion of the active pattern; an active contact electrically connected to the source/drain pattern; and a silicide layer between the source/drain pattern and the active contact, the source/drain pattern including a body part including a plurality of semiconductor patterns; and a capping pattern on the body part, the body part has a first facet, a second facet on the first facet, and a corner edge defined where the first facet meets the second facet, the corner edge extending parallel to the substrate, the capping pattern covers the second facet of the body part and exposes the corner edge, and the silicide layer covers a top surface of the body part and a top surface of the capping pattern.

公开(公告)号：US20190273153A1

公开(公告)日：2019-09-05

申请号：US16417973

申请日：2019-05-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Edward Namkyu CHO ,  Bo-ra LIM ,  Geum-jung SEONG ,  Seung-hun LEE

IPC: H01L29/66 ,  H01L21/8238 ,  H01L21/02 ,  H01L29/08 ,  H01L29/78 ,  H01L21/308 ,  H01L21/8234 ,  H01L27/092

Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.

公开(公告)号：US20190067455A1

公开(公告)日：2019-02-28

申请号：US15870549

申请日：2018-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Edward Namkyu CHO ,  Bo-ra LIM ,  Geum-jung SEONG ,  Seung-hun LEE

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L21/8238 ,  H01L21/8234 ,  H01L21/02 ,  H01L21/308

Abstract: An integrated circuit device includes: a first fin active region extending in a first direction parallel to a top surface of a substrate; a second fin active region extending in the first direction and spaced apart from the first fin active region in a second direction different from the first direction; a gate line intersecting the first and second fin active regions; a first source/drain region on one side of the gate line in the first fin active region; and a second source/drain region on one side of the gate line in the second fin active region and facing the first source/drain region, wherein a cross-section of the first source/drain region perpendicular to the first direction has an asymmetric shape with respect to a center line of the first source/drain region in the second direction extending in a third direction perpendicular to the top surface of the substrate.