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公开(公告)号:US20240047306A1
公开(公告)日:2024-02-08
申请号:US18220971
申请日:2023-07-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Dongick Anthony LEE , Minchan Gwak , Gukhee Kim , Youngwoo Kim , Sangcheol Last Name not provide
CPC classification number: H01L23/481 , H01L29/7851 , H01L29/66795 , H01L29/66545
Abstract: A semiconductor device includes a base layer including a silicon material. A field effect transistor is disposed on a first surface of the base layer. A first insulating interlayer covers the field effect transistor, A buried vertical rail passes through the first insulating interlayer and the base layer. The buried vertical rail includes a first metal pattern and a first barrier pattern surrounding a sidewall of the first metal pattern. A first lower insulating interlayer is on the second surface of the base layer. A lower contact plug passes through the first lower insulating interlayer and directly contacts a lower surface of the buried vertical rail. The lower contact plug includes a second metal pattern and a second barrier pattern surrounding a sidewall of the second metal pattern. A bottom surface of the first metal pattern and a top surface of the second metal pattern directly contact each other.