公开(公告)号：US09183902B2

公开(公告)日：2015-11-10

申请号：US14460561

申请日：2014-08-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dae-sik Moon ,  Seung-jun Bae ,  Joon-young Park ,  Yoon-joo Eom

IPC: G11C7/00 ,  G11C7/10 ,  G11C7/22 ,  G11C11/4076 ,  G11C11/4093

CPC classification number: G11C7/1087 ,  G11C7/1012 ,  G11C7/1093 ,  G11C7/222 ,  G11C11/4076 ,  G11C11/4093

Abstract: An input data alignment circuit includes a data sampler, a frequency divider, a polarity determination block, and a data alignment block. The data sampler provides a data sequence based on data serially input according to a data strobe signal. The frequency divider generates a data alignment signal based on a divided frequency of the data strobe signal. The polarity determination block determines a polarity of the data alignment signal and provides a control signal based on the determined polarity. The data alignment block aligns the data sequence in parallel according to data alignment signal and control signal and generates output data.

Abstract translation: 输入数据对准电路包括数据采样器，分频器，极性确定块和数据对准块。 数据采样器基于根据数据选通信号串行输入的数据提供数据序列。 分频器基于数据选通信号的分频来产生数据对准信号。 极性确定块确定数据对准信号的极性，并根据确定的极性提供控制信号。 数据对齐块根据数据对齐信号和控制信号并行对齐数据序列，并生成输出数据。