公开(公告)号：US20160181198A1

公开(公告)日：2016-06-23

申请号：US14971402

申请日：2015-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： DAEIK KIM ,  Jemin Park ,  Sunghee Han ,  Yoosang Hwang

IPC: H01L23/522 ,  H01L29/06 ,  H01L27/108

CPC classification number: H01L23/5223 ,  H01L23/5226 ,  H01L27/10814 ,  H01L27/10817 ,  H01L27/10855 ,  H01L27/10897 ,  H01L29/4236 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a first device isolation region and a second device isolation region defining a first active region, a second active region, and a third active region in a substrate, a recess region exposing an upper surface of the first active region and upper surfaces of the first and second device isolation regions, and active buffer patterns on the second and third active regions. The first active region is located between the second and third active regions, the first device isolation region is located between the first and second active regions, the second device isolation region is located between the first and third active regions. Upper sidewalls of the second and third active regions are exposed in the recess region.

Abstract translation: 半导体器件包括第一器件隔离区和限定衬底中的第一有源区，第二有源区和第三有源区的第二器件隔离区，暴露第一有源区的上表面的凹陷区和上表面 的第一和第二器件隔离区域以及第二和第三有效区域上的主动缓冲器图案。 第一有源区位于第二和第三有源区之间，第一器件隔离区位于第一和第二有源区之间，第二器件隔离区位于第一和第三有源区之间。 第二和第三有源区域的上侧壁在凹陷区域中露出。

公开(公告)号：US20180122811A1

公开(公告)日：2018-05-03

申请号：US15614077

申请日：2017-06-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： DAEIK KIM ,  KISEOK LEE ,  KEUNNAM KIM ,  BONG-SOO KIM ,  JEMIN PARK ,  CHAN-SIC YOON ,  YOOSANG HWANG

IPC: H01L27/108

CPC classification number: H01L27/10897 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10894

Abstract: Methods of fabricating a memory device are provided. The methods may include forming a mask pattern including line-shaped portions that are parallel to each other and extend on a first region of a substrate. The mask pattern may extend on a second region of the substrate. The methods may also include forming word line regions in the first region using the mask pattern as a mask, forming word lines in the word line regions, respectively, and removing the mask pattern from the second region to expose the second region. The mask pattern may remain on the first region after removing the mask pattern from the second region. The methods may further include forming a channel epitaxial layer on the second region while using the mask pattern as a barrier to growth of the channel epitaxial layer on the first region.