公开(公告)号：US20150111360A1

公开(公告)日：2015-04-23

申请号：US14515874

申请日：2014-10-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Wan KIM ,  Byeung-Chul KIM ,  Bong-Soo KIM ,  Je-Min PARK ,  Yoo-Sang HWANG

IPC: H01L27/108 ,  H01L21/3213 ,  H01L29/423 ,  H01L21/3205 ,  H01L49/02 ,  H01L21/768

CPC classification number: H01L27/10855 ,  H01L21/32139 ,  H01L21/7685 ,  H01L21/76877 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10876 ,  H01L27/10885 ,  H01L27/10888 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/91 ,  H01L29/4236

Abstract: A method of manufacturing a semiconductor device includes forming a first conductive layer on a substrate, partially removing the first conductive layer and an upper portion of the substrate to form a recess, forming a second conductive layer pattern to fill the recess, forming a third conductive layer on the second conductive layer pattern and the first conductive layer, and patterning the third conductive layer and the second conductive layer pattern to form a bit line structure and a bit line contact, respectively.

Abstract translation: 制造半导体器件的方法包括在衬底上形成第一导电层，部分地去除第一导电层和衬底的上部以形成凹陷，形成第二导电层图案以填充凹部，形成第三导电 在第二导电层图案和第一导电层上的层，并且分别构图第三导电层和第二导电层图案以形成位线结构和位线接触。