公开(公告)号：US20160019826A1

公开(公告)日：2016-01-21

申请号：US14608657

申请日：2015-01-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sujin KIM ,  Young-IL BAN ,  Sun-Koo KANG ,  Sunkyu SON

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G3/3685 ,  G09G2300/0426 ,  G09G2300/08 ,  G09G2330/025 ,  G09G2330/04 ,  H01L27/0266

Abstract: A display device includes a first interconnection line, a first data driver, a second interconnection line, an electrostatic discharge (ESD) circuit, and a display panel. The first connection line transmits a data driving signal. The first data driver includes the first interconnection line and output a data signal based on the data driving signal. The second interconnection line passes through the first data driver and transmits a gate driving signal. The ESD) circuit in the first data driver and discharges static electricity transmitted through the second interconnection line. The first gate driver outputs a gate signal based on the gate driving signal transmitted through the second interconnection line. The display panel receives the data signal and the gate signal.

Abstract translation: 显示装置包括第一互连线，第一数据驱动器，第二互连线，静电放电（ESD）电路和显示面板。 第一连接线传输数据驱动信号。 第一数据驱动器包括第一互连线并基于数据驱动信号输出数据信号。 第二互连线通过第一数据驱动器并传输门驱动信号。 ESD）电路，并释放通过第二互连线传输的静电。 第一栅极驱动器基于通过第二互连线传输的栅极驱动信号输出栅极信号。 显示面板接收数据信号和门信号。

公开(公告)号：US20140368482A1

公开(公告)日：2014-12-18

申请号：US14470511

申请日：2014-08-27

Applicant: SAMSUNG DISPLAY CO.,LTD.

Inventor： Ok-Kwon SHIN ,  Jong Min LEE ,  Sun Kyu SON ,  Young-IL BAN ,  Jae-Han LEE

IPC: G09G3/36

CPC classification number: G09G3/3674 ,  G09G3/3677 ,  G09G2310/0205 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28 ,  G11C19/287

Abstract: A gate driver includes a gate integrated circuit (“IC”) chip which receives at least two scanning start signals and at least four clock control signals, and outputs a plurality of gate-on voltages, where at least two clock control signals of the at least four clock control signals are generated based on one scanning start signal of the at least two scanning start signals, timings of the at least two scanning start signals are independent of each other, and timings of the at least two clock control signals based on the one scanning start signal are independent of each other.

Abstract translation: 栅极驱动器包括：门集成电路（IC）芯片，其接收至少两个扫描开始信号和至少四个时钟控制信号，并且输出多个栅极导通电压，其中至少两个时钟控制信号 基于所述至少两个扫描开始信号的一个扫描开始信号生成至少四个时钟控制信号，所述至少两个扫描开始信号的定时彼此独立，并且所述至少两个时钟控制信号的定时基于 一个扫描开始信号彼此独立。