公开(公告)号：US20170053585A1

公开(公告)日：2017-02-23

申请号：US15054580

申请日：2016-02-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： YOUNG-SOO SOHN ,  NEUNG-BEOM LEE ,  JEONG-HYUN KIM ,  JIN-SEUK KIM ,  WON-HEE LEE

IPC: G09G3/20

CPC classification number: G09G3/3674 ,  G09G3/20 ,  G09G2310/0248 ,  G09G2310/0267

Abstract: A gate driver includes a first shift-register including a plurality of odd-numbered stages which outputs a plurality of odd-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a first gate clock signal, a second shift-register comprising a plurality of even-numbered stages which outputs a plurality of even-numbered original gate signals having a pre-charge pulse and a main-charge pulse in synchronization with a second gate clock signal, a first inverter configured to output a first inversion pre-charge control signal having a phase opposite to a phase of a first pre-charge control signal, and a second inverter configured to output a second inversion pre-charge control signal having a phase opposite to a phase of a second pre-charge control signal.

Abstract translation: 栅极驱动器包括：第一移位寄存器，包括多个奇数级，其与第一栅极时钟信号同步地输出具有预充电脉冲和主充电脉冲的多个奇数原始栅极信号; 第二移位寄存器，包括多个偶数级，其输出具有与第二栅极时钟信号同步的预充电脉冲和主充电脉冲的多个偶数原始门信号，第一反相器被配置为输出 第一反相预充电控制信号，其具有与第一预充电控制信号的相位相反的相位;以及第二反相器，被配置为输出具有与第二预充电控制信号的相位相反的相位的第二反相预充电控制信号 充电控制信号。