Abstract:
A pressure sensor sub-assembly (18) has a solid-state sensing element (22) mounted on a laminated ceramic substrate (20) and has the electrical signal contacts (22a) on the sensing element electrically connected to connector pins (24) on the substrate. A manufacturing process can fabricate a batch of sub-assemblies on a substrate structure that is sub-divided to form the separate sub-assemblies. The sensor sub-assemblies can be tested, and graded, before or after the sub-division step, and then each mounted in a housing.
Abstract:
An integrated circuit board assembly includes two integrated circuit boards. The integrated circuit boards have an electronic circuitry configured on the interior face and a dielectric sealant on the other face. The integrated circuit boards are secured to a frame in such a manner that the interior faces of the integrated circuit boards face inward toward each other. The securing of the frame to the integrated circuit boards is such that it forms a sealed enclosure protecting the electronic circuitry configured therein from the process environment. The exterior faces, however, are exposed to the process environment and are helpful in dissipating heat to the exterior environment.
Abstract:
A method for patterning a tape to which an integrated circuit may be bonded including providing a tape having a top layer of unexposed film which, when exposed in an interconnection pattern and developed, acts as a mask for processing a photoprocessable layer of the tape to provide conductive portions in an interconnection pattern on the tape.
Abstract:
A pressure sensor sub-assembly (18) has a solid-state sensing element (22) mounted on a laminated ceramic substrate (20) and has the electrical signal contacts (22a) on the sensing element electrically connected to connector pins (24) on the substrate. A manufacturing process can fabricate a batch of sub-assemblies on a substrate structure that is sub-divided to form the separate sub-assemblies. The sensor sub-assemblies can be tested, and graded, before or after the sub-division step, and then each mounted in a housing.
Abstract:
A method for patterning a tape to which an integrated circuit may be bonded including providing a tape having a top layer of unexposed film which, when exposed in an interconnection pattern and developed, acts as a mask for processing a photoprocessable layer of the tape to provide conductive portions in an interconnection pattern on the tape.