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公开(公告)号:US11770524B2
公开(公告)日:2023-09-26
申请号:US17524708
申请日:2021-11-11
发明人: Weimin Zeng , Chi-Wang Chai , Wei Li , Rong Zhang , Wujun Chen
IPC分类号: H04N19/117 , H04N19/147 , H04N19/176 , H04N19/82
CPC分类号: H04N19/117 , H04N19/147 , H04N19/176 , H04N19/82
摘要: A loop filter utilized in an encoder includes a constrained directional enhancement filter and a decision circuit. The constrained directional enhancement filter is arranged to process multiple frames, wherein for a first frame in the multiple frames, the constrained directional enhancement filter determines a best filter strength of each block in the first frame in a first filter strength list, and determines a second filter strength list according to content of the first frame. The decision circuit is coupled to the constrained directional enhancement filter, and is arranged to record which index in the first filter strength list is the best filter strength corresponding to each block in the first frame, and provide the first filter strength list and the index corresponding to each block to an encoding circuit of the encoder as an output of the encoder.
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公开(公告)号:US20230141735A1
公开(公告)日:2023-05-11
申请号:US17524708
申请日:2021-11-11
发明人: Weimin Zeng , Chi-Wang Chai , Wei Li , Rong Zhang , Wujun Chen
IPC分类号: H04N19/117 , H04N19/82 , H04N19/147 , H04N19/176
CPC分类号: H04N19/117 , H04N19/82 , H04N19/147 , H04N19/176
摘要: A loop filter utilized in an encoder includes a constrained directional enhancement filter and a decision circuit. The constrained directional enhancement filter is arranged to process multiple frames, wherein for a first frame in the multiple frames, the constrained directional enhancement filter determines a best filter strength of each block in the first frame in a first filter strength list, and determines a second filter strength list according to content of the first frame. The decision circuit is coupled to the constrained directional enhancement filter, and is arranged to record which index in the first filter strength list is the best filter strength corresponding to each block in the first frame, and provide the first filter strength list and the index corresponding to each block to an encoding circuit of the encoder as an output of the encoder.
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公开(公告)号:US20210337192A1
公开(公告)日:2021-10-28
申请号:US16857187
申请日:2020-04-24
发明人: Weimin Zeng , Chi-Wang Chai , Wujun Chen , Jing Wang , Rong Zhang
IPC分类号: H04N19/117 , H04N19/176 , H04N19/573 , H04N19/139
摘要: An image processing method includes: determining a first block and a second block corresponding to a current block; dividing each of the current block, the first block and the second block into a plurality of clusters; for a cluster having a corresponding location within each of the current block, the first block and the second block, performing gradient calculations on pixel values within the cluster of the first block and pixel values within the cluster of the second block, and accordingly determining an adjustment value, wherein a window size of the cluster used in the gradient calculations is one or zero; and for a pixel within the cluster of the current block, referring to a pixel value of the pixel of the first block, a pixel value of the pixel of the second block and the adjustment value to calculate a pixel value of the pixel of the current block.
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公开(公告)号:US20220303538A1
公开(公告)日:2022-09-22
申请号:US17207771
申请日:2021-03-22
发明人: Weimin Zeng , Chi-Wang Chai , Wei Li , QingXi He , Wujun Chen , Rong Zhang
IPC分类号: H04N19/124 , H04N19/142 , H04N19/159 , H04N19/169 , H04N19/176
摘要: An encoder includes a frame level processing circuit, a coding tree unit (CTU) level processing circuit and an encoding circuit. The frame level processing circuit is arranged to calculate a bit number of a current frame according a target bitrate and a frame rate, and the frame level processing circuit is further arranged to calculate a quantization parameter of the current frame according to the bit number of the current frame and at least one parameter. The CTU level processing circuit is arranged to use an adaptive quantization mode to adjust the quantization parameter to generate an adjusted quantization parameter. The encoding circuit is arranged to encode the current frame to generate output data according to the adjusted quantization parameter.
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公开(公告)号:US11523117B2
公开(公告)日:2022-12-06
申请号:US17207771
申请日:2021-03-22
发明人: Weimin Zeng , Chi-Wang Chai , Wei Li , QingXi He , Wujun Chen , Rong Zhang
IPC分类号: H04N19/124 , H04N19/142 , H04N19/176 , H04N19/169 , H04N19/159
摘要: An encoder includes a frame level processing circuit, a coding tree unit (CTU) level processing circuit and an encoding circuit. The frame level processing circuit is arranged to calculate a bit number of a current frame according a target bitrate and a frame rate, and the frame level processing circuit is further arranged to calculate a quantization parameter of the current frame according to the bit number of the current frame and at least one parameter. The CTU level processing circuit is arranged to use an adaptive quantization mode to adjust the quantization parameter to generate an adjusted quantization parameter. The encoding circuit is arranged to encode the current frame to generate output data according to the adjusted quantization parameter.
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