公开(公告)号：US20180267891A1

公开(公告)日：2018-09-20

申请号：US15882847

申请日：2018-01-29

申请人： Rambus Inc.

发明人： Thomas A. Sheffler ,  Lawrence Lai ,  Liang Peng ,  Bohuslav Rychlik

IPC分类号： G06F12/02 ,  G11C7/10 ,  G11C8/10 ,  G11C7/22

CPC分类号： G06F12/023 ,  G06F2212/2024 ,  G11C7/1006 ,  G11C7/1039 ,  G11C7/22 ,  G11C8/10 ,  G11C2207/107 ,  H05K999/99

摘要： A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first data, constituted by a plurality of read data values, out of the address-specified sense amplifiers, and (iii) overwrites the first data within the address-specified sense amplifiers with second data constituted by one or more of the write data values and by one or more of the read data values.

公开(公告)号：US09898400B2

公开(公告)日：2018-02-20

申请号：US15497126

申请日：2017-04-25

申请人： Rambus Inc.

发明人： Thomas A. Sheffler ,  Lawrence Lai ,  Liang Peng ,  Bohuslav Rychlik

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28 ,  G06F12/02 ,  G11C7/10 ,  G11C7/22 ,  G11C8/10

CPC分类号： G06F12/023 ,  G06F2212/2024 ,  G11C7/1006 ,  G11C7/1039 ,  G11C7/22 ,  G11C8/10 ,  G11C2207/107

摘要： A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first data, constituted by a plurality of read data values, out of the address-specified sense amplifiers, and (iii) overwrites the first data within the address-specified sense amplifiers with second data constituted by one or more of the write data values and by one or more of the read data values.

公开(公告)号：US20170293552A1

公开(公告)日：2017-10-12

申请号：US15497126

申请日：2017-04-25

申请人： Rambus Inc.

发明人： Thomas A. Sheffler ,  Lawrence Lai ,  Liang Peng ,  Bohuslav Rychlik

IPC分类号： G06F12/02 ,  G11C7/22 ,  G11C8/10 ,  G11C7/10

CPC分类号： G06F12/023 ,  G06F2212/2024 ,  G11C7/1006 ,  G11C7/1039 ,  G11C7/22 ,  G11C8/10 ,  G11C2207/107

摘要： A memory access command, column address and plurality of write data values are received within an integrated-circuit memory chip via external signaling links. In response to the memory access command, the integrated-circuit memory chip (i) decodes the column address to select address-specified sense amplifiers from among a plurality of sense amplifiers that constitute a sense amplifier bank, (ii) reads first data, constituted by a plurality of read data values, out of the address-specified sense amplifiers, and (iii) overwrites the first data within the address-specified sense amplifiers with second data constituted by one or more of the write data values and by one or more of the read data values.