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公开(公告)号：US20130265842A1
公开(公告)日：2013-10-10
申请号：US13901014
申请日：2013-05-23
申请人： Rambus Inc.
IPC分类号： G11C8/06
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0673 , G11C7/1006 , G11C7/1042 , G11C7/22 , G11C8/06 , G11C11/4076 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
摘要翻译： 微线程存储器件。 提供了多个存储体，每个存储体包括多行存储单元并且具有访问限制，因为至少最小访问时间间隔必须在对存储单元的给定行的连续访问之间发生。 提供传送控制电路以响应于第一存储器访问请求在多个存储体和外部信号路径之间传送第一数据量，第一数据量小于外部信号路径带宽和 最小访问时间间隔。
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公开(公告)号：US20230376249A1
公开(公告)日：2023-11-23
申请号：US18340810
申请日：2023-06-23
申请人： Rambus Inc.
IPC分类号： G06F3/06 , G11C7/10 , G11C7/22 , G11C11/4076 , G11C11/4097 , G11C8/06
CPC分类号： G06F3/0659 , G11C7/1006 , G11C7/1042 , G11C7/22 , G11C11/4076 , G11C11/4097 , G11C8/06 , G06F3/0613 , G06F3/0673
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
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公开(公告)号：US20190339908A1
公开(公告)日：2019-11-07
申请号：US16405479
申请日：2019-05-07
申请人： Rambus Inc.
IPC分类号： G06F3/06 , G11C8/06 , G11C7/10 , G11C11/4076 , G11C7/22 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
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公开(公告)号：US11797227B2
公开(公告)日：2023-10-24
申请号：US16405479
申请日：2019-05-07
申请人： Rambus Inc.
IPC分类号： G06F3/06 , G11C7/10 , G11C7/22 , G11C11/4076 , G11C11/4097 , G11C8/06
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0673 , G11C7/1006 , G11C7/1042 , G11C7/22 , G11C8/06 , G11C11/4076 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
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公开(公告)号：US20170286017A1
公开(公告)日：2017-10-05
申请号：US15486068
申请日：2017-04-12
申请人： Rambus Inc.
IPC分类号： G11C7/10 , G11C11/4097 , G06F3/06 , G11C8/06 , G11C7/22 , G11C11/4076
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0673 , G11C7/1006 , G11C7/1042 , G11C7/22 , G11C8/06 , G11C11/4076 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
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公开(公告)号：US10331379B2
公开(公告)日：2019-06-25
申请号：US15486068
申请日：2017-04-12
申请人： Rambus Inc.
IPC分类号： G06F3/06 , G11C7/10 , G11C7/22 , G11C8/06 , G11C11/4076 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
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公开(公告)号：US09652176B2
公开(公告)日：2017-05-16
申请号：US14449610
申请日：2014-08-01
申请人： Rambus Inc.
IPC分类号： G06F3/06 , G11C8/06 , G11C11/4076 , G11C7/22 , G11C7/10 , G11C11/4097
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0673 , G11C7/1006 , G11C7/1042 , G11C7/22 , G11C8/06 , G11C11/4076 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
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公开(公告)号：US09292223B2
公开(公告)日：2016-03-22
申请号：US13901014
申请日：2013-05-23
申请人： Rambus Inc.
IPC分类号： G06F3/06 , G11C7/10 , G11C8/06 , G11C11/4076 , G11C11/4097 , G11C7/22
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0673 , G11C7/1006 , G11C7/1042 , G11C7/22 , G11C8/06 , G11C11/4076 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
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公开(公告)号：US20140344546A1
公开(公告)日：2014-11-20
申请号：US14449610
申请日：2014-08-01
申请人： Rambus Inc.
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0673 , G11C7/1006 , G11C7/1042 , G11C7/22 , G11C8/06 , G11C11/4076 , G11C11/4097
摘要： A micro-threaded memory device. A plurality of storage banks are provided, each including a plurality of rows of storage cells and having an access restriction in that at least a minimum access time interval must transpire between successive accesses to a given row of the storage cells. Transfer control circuitry is provided to transfer a first amount of data between the plurality of storage banks and an external signal path in response to a first memory access request, the first amount of data being less than a product of the external signal path bandwidth and the minimum access time interval.
摘要翻译： 微线程存储器件。 提供了多个存储体，每个存储体包括多行存储单元并且具有访问限制，因为至少最小访问时间间隔必须在对存储单元的给定行的连续访问之间发生。 提供传送控制电路以响应于第一存储器访问请求在多个存储体和外部信号路径之间传送第一数据量，第一数据量小于外部信号路径带宽和 最小访问时间间隔。
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