公开(公告)号：US20210257443A1

公开(公告)日：2021-08-19

申请号：US17154775

申请日：2021-01-21

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Chiemi HASHIMOTO ,  Kosuke YAYAMA ,  Hidekazu TAWARA

IPC: H01L49/02 ,  H01L27/06 ,  H01L23/522 ,  H01F7/06 ,  H03B5/24

Abstract: A resistance element includes a conductor, the conductor having a repeating pattern of: a first conductive layer formed on a first interlayer insulating layer on a semiconductor substrate; a second conductive layer formed on a second interlayer insulating layer different from the first interlayer insulating layer; and an interlayer conductive layer connecting the first conductive layer and the second conductive layer, and the second conductive layer has a resistance-value fluctuation characteristic opposite to a resistance-value fluctuation characteristic of the first conductive layer after a heat treatment.

公开(公告)号：US20200076409A1

公开(公告)日：2020-03-05

申请号：US16534592

申请日：2019-08-07

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Chiemi HASHIMOTO ,  Kosuke YAYAMA ,  Tomokazu MATSUZAKI

IPC: H03K3/011 ,  H01L49/02 ,  H01L23/522 ,  G01L1/22

Abstract: The polysilicon resistance has a large resistance variation rate after the end of the mold packaging process. In order to enable high-precision trimming, it is desired to realize a resistance which is hardly affected by stress and temperature fluctuation generated in a substrate by a mold packaging process. A resistance element is formed in a plurality of wiring layers, and has a first conductive layer formed in a first wiring layer, a second conductive layer formed in a second wiring layer, and a repeating pattern of an interlayer conductive layer connecting the first conductive layer and the second conductive layer, and the interlayer conductive layer is formed of a plurality of types of materials.

公开(公告)号：US20180375497A1

公开(公告)日：2018-12-27

申请号：US16004014

申请日：2018-06-08

Applicant: Renesas Electronics Corporation

Inventor： Chiemi HASHIMOTO ,  Kosuke YAYAMA ,  Katsumi TSUNENO ,  Tomokazu MATSUZAKI

IPC: H03K3/011 ,  H01L27/08 ,  H01L49/02 ,  H01L23/522 ,  H03K3/356

Abstract: A polycrystalline silicon resistor is large in coefficient of fluctuation in resistance between before and after the completion of a package molding process. To enable highly accurate trimming, it is desired to implement a resistor that is hardly subjected to stress produced in a substrate during a package molding process. A resistance element is formed of a plurality of wiring layers and has a repetitive pattern of a first conductive layer formed in a first wiring layer, a second conductive layer formed in a second wiring layer, and an interlayer conductive layer coupling the first conductive layer and the second conductive layer together.