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公开(公告)号：US10200075B2
公开(公告)日：2019-02-05
申请号：US15062025
申请日：2016-03-04
Applicant: RAYTHEON COMPANY
Inventor： John P Gianvittorio , Denpol Kultran , Harry Marr
Abstract: A reconfigurable discrete time analog signal processor includes a finite impulse response (FIR) filter configured to receive a portion of an RF transmit signal, to receive FIR coefficients, and to generate a leakage cancellation signal based on the portion of the RF transmit signal and the FIR coefficients, the FIR filter including sample and hold (SH) circuits configured to receive the portion of the RF transmit signal, to sample the portion of the RF transmit signal at successive sample times according to a sample clock, and to generate sampled analog voltage signals, and analog multipliers coupled to the SH circuits and configured to multiply the sampled analog voltage signals by binary multiplication factors to generate the leakage cancellation signal.
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公开(公告)号：US20170257136A1
公开(公告)日：2017-09-07
申请号：US15062025
申请日：2016-03-04
Applicant: RAYTHEON COMPANY
Inventor： John P Gianvittorio , Denpol Kultran , Harry Marr
Abstract: A reconfigurable discrete time analog signal processor includes a finite impulse response (FIR) filter configured to receive a portion of an RF transmit signal, to receive FIR coefficients, and to generate a leakage cancellation signal based on the portion of the RF transmit signal and the FIR coefficients, the FIR filter including sample and hold (SH) circuits configured to receive the portion of the RF transmit signal, to sample the portion of the RF transmit signal at successive sample times according to a sample clock, and to generate sampled analog voltage signals, and analog multipliers coupled to the SH circuits and configured to multiply the sampled analog voltage signals by binary multiplication factors to generate the leakage cancellation signal.
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