公开(公告)号：US20040219704A1

公开(公告)日：2004-11-04

申请号：US10428745

申请日：2003-05-02

Applicant: RAYTHEON COMPANY

Inventor： Athanasios J. Syllaios ,  Roland W. Gooch ,  Thomas R. Schimert ,  Edward G. Meissner

IPC: H01L021/00 ,  H01L021/302 ,  H01L021/461

CPC classification number: G02B1/118 ,  B81B7/00

Abstract: A method for manufacturing optically-transparent lids includes etching sub-wavelength structures on a surface of a lid wafer. The structures may be arrayed in a hexagonally closed-packed pattern.

Abstract translation: 用于制造光学透明盖的方法包括在盖晶片的表面上蚀刻亚波长结​​构。 结构可以排列成六边形封闭图案。

公开(公告)号：US20040211901A1

公开(公告)日：2004-10-28

申请号：US10421477

申请日：2003-04-22

Applicant: RAYTHEON COMPANY

Inventor： Athanasios J. Syllaios ,  Prem Chahal

IPC: G01J005/02

CPC classification number: G01J5/08 ,  G01J3/51 ,  G01J5/0862 ,  G01J5/20 ,  G01N21/3504 ,  H01L27/14618 ,  H01L27/14649 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for forming an integrated circuit includes providing an array of detectors proximate an outer surface of a first substrate layer. The array of detectors operate to detect the presence or absence of one or more wavelengths within a spectrum of transmitted energy. One or more filters are provided proximate a second substrate layer. The one or more filters operate to affect the spectrum of transmitted energy through the one or more filters. The second substrate layer is proximate to the outer surface of the first substrate layer to enclose the array of detectors in a vacuum environment.

Abstract translation: 一种用于形成集成电路的方法包括提供靠近第一基底层的外表面的检测器阵列。 检测器阵列用于检测在发射能量谱范围内存在或不存在一个或多个波长。 在第二基底层附近提供一个或多个过滤器。 一个或多个滤波器操作以影响通过一个或多个滤波器的发射能量的频谱。 第二基底层靠近第一基底层的外表面以在真空环境中包围检测器阵列。

公开(公告)号：US20040219764A1

公开(公告)日：2004-11-04

申请号：US10428627

申请日：2003-05-02

Applicant: RAYTHEON COMPANY

Inventor： Athanasios J. Syllaios ,  Roland W. Gooch ,  Thomas R. Schimert

IPC: H01L021/30 ,  H01L021/46 ,  H01L021/00

CPC classification number: B81C1/00269

Abstract: A method for manufacturing integrated circuit device lids includes creating a lid cavity on the surface of a lid wafer, forming a sealing surface on the lid wafer that surrounds the lid cavity, and forming a trench on the lid wafer between the lid cavity and the sealing surface. The resulting structure uptakes excess sealing surface material and prevents such material from entering the lid cavity.

Abstract translation: 集成电路器件盖的制造方法包括在盖晶片的表面上形成盖腔，在盖晶片上形成围绕盖腔的密封面，并且在盖体和盖密封之间形成沟槽 表面。 所产生的结构吸收多余的密封表面材料并防止这种材料进入盖腔。