公开(公告)号：US20240161808A1

公开(公告)日：2024-05-16

申请号：US17988186

申请日：2022-11-16

Applicant: QUALCOMM Incorporated

Inventor： Yong XU ,  Boris Dimitrov ANDREEV ,  Yuxin LI ,  Vikas MAHENDIYAN

IPC: G11C11/4076 ,  H03K19/20 ,  H03L7/081

CPC classification number: G11C11/4076 ,  H03K19/20 ,  H03L7/0812

Abstract: In certain aspects, a system includes a first clock source configured to generate a first clock signal, a second clock source configured to generate a second clock signal, a clock path, and an OR gate having a first input, a second input, and an output, wherein the output of the OR gate is coupled to the clock path. The system also includes a first clock gating circuit coupled between the first clock source and the first input of the OR gate, and a second clock gating circuit coupled between the second clock source and the second input of the OR gate.