公开(公告)号：US20210270974A1

公开(公告)日：2021-09-02

申请号：US16803410

申请日：2020-02-27

Applicant: QUALCOMM Incorporated

Inventor： Philip CRARY ,  Troy LI ,  Scott SCIGLIANO

IPC: G01S19/25 ,  G01S19/24 ,  G01S19/23 ,  G01S19/29 ,  G01S19/05 ,  G06F1/3203 ,  H01C7/00

Abstract: System and method for adjusting timing error in a mobile device. In the mobile device, a crystal oscillator (XO) is used by a system timer as the timing source. When the mobile device enters into a sleep mode, the system timer is set to time the duration of the sleep mode. During the sleep mode, a thermistor is used to measure and monitor the temperature changes of the XO. After the sleep mode is over, a processor in the mobile device determines the frequency changes of the XO based on the temperature changes of the XO. Based on the frequency changes of the XO, the processor determines the timing error that may have occurred when the system timer was timing the sleep mode and determines the actual duration of the sleep mode by adjusting the duration timed by the system timer based on the timing error.

公开(公告)号：US20240330212A1

公开(公告)日：2024-10-03

申请号：US18192033

申请日：2023-03-29

Applicant: QUALCOMM Incorporated

Inventor： Aditya AWASTHI ,  Tsung-Han YU ,  Troy LI ,  Sundar Rajan BALASUBRAMANIAN ,  Ankita NAYAK ,  Leiter KANG

IPC: G06F13/16 ,  G06F15/173

CPC classification number: G06F13/1657 ,  G06F13/1668 ,  G06F15/17375

Abstract: Certain aspects of the present disclosure provide techniques and apparatus for efficiently accessing memory in a computing system. An example method includes organizing a plurality of physical memory banks having a base size into a plurality of logical memory banks. A request to execute operations on the plurality of physical memory banks is received. The request to execute the operations comprises a request to interact with data having a sample width based on the base size. Responsive to receiving the request to execute the operations, the operations are executed on one or more logical memory banks of the plurality of logical memory banks via a memory crossbar shared across the plurality of logical memory banks. An amount of the data on which the operations are executed is a multiple of the sample width, and each logical memory bank has a size based on the base size and a multiplier value.