公开(公告)号：US20230097103A1

公开(公告)日：2023-03-30

申请号：US17448810

申请日：2021-09-24

Applicant: QUALCOMM Incorporated

Inventor： Santosh Srivatsan Srinivasan ,  Marc Hoffman ,  Srijesh Sudarsanan ,  Deepak Mathew ,  Hongfeng Dong ,  Gerald Sweeney

IPC: G06F17/14 ,  G06F9/30

Abstract: A device includes a memory configured to store a fast Fourier transform (FFT) instruction and parameters of the FFT instruction, a read-only memory including a phasor table, and a processor. The processor is configured to execute the FFT instruction to determine, based on the parameters of the FFT instruction, a start value and a step size. The processor is configured to execute the FFT instruction to access the phasor table according to the start value and the step size to obtain a set of twiddle values. The processor is also configured to execute the FFT instruction to compute, for each pair of input values in a set of input data, an output value based on the pair of input values and a twiddle value, of the set of twiddle values, that corresponds to that pair of input values.