公开(公告)号：US11682109B2

公开(公告)日：2023-06-20

申请号：US17073218

申请日：2020-10-16

Applicant: QUALCOMM Incorporated

Inventor： Kalyan Kumar Bhiravabhatla ,  Krishnaiah Gummidipudi ,  Ankit Kumar Singh ,  Andrew Evan Gruber ,  Pavan Kumar Akkaraju ,  Srihari Babu Alla ,  Jonnala Gadda Nagendra Kumar ,  Vishwanath Shashikant Nikam

IPC: G06T5/40 ,  G06T7/13 ,  G06T1/20 ,  G06T5/20 ,  G06T15/00 ,  G06T15/40

CPC classification number: G06T5/40 ,  G06T1/20 ,  G06T5/20 ,  G06T7/13 ,  G06T15/005 ,  G06T15/40

Abstract: This disclosure provides systems, devices, apparatus, and methods, including computer programs encoded on storage media, for configurable aprons for expanded binning. Aspects of the present disclosure include identifying one or more pixel tiles in at least one bin and determining edge information for each pixel tile of the one or more pixel tiles. The edge information may be associated with one or more pixels adjacent to each pixel tile. The present disclosure further describes determining whether at least one adjacent bin is visible based on the edge information for each pixel tile, where the at least one adjacent bin may be adjacent to the at least one bin.

公开(公告)号：US11282260B2

公开(公告)日：2022-03-22

申请号：US16896955

申请日：2020-06-09

Applicant: QUALCOMM Incorporated

Inventor： Piyush Gupta ,  Geetika Malhotra ,  Pavan Kumar Akkaraju

IPC: G06T15/06 ,  G06T17/00 ,  G06T15/08

Abstract: A method is presented. The method includes organizing a scene as a number of bounding volumes in a hierarchical data structure. The method also includes generating a grid based on the hierarchical data structure. The method further includes mapping each node of the hierarchical data structure to at least one cell of the grid. The method additionally includes identifying a cell of the grid corresponding to an initial intersection location of a ray and the scene. The method still further includes determining a non-root node of the hierarchical data structure as a start node for traversing the hierarchical data structure based on the identified cell. The method also includes traversing the hierarchical data structure starting from the start node to identify a number a primitives intersected by the ray.

公开(公告)号：US12249021B2

公开(公告)日：2025-03-11

申请号：US17934869

申请日：2022-09-23

Applicant: QUALCOMM Incorporated

Inventor： Piyush Gupta ,  Pavan Kumar Akkaraju ,  Alexei Vladimirovich Bourd ,  Andrew Evan Gruber

IPC: G06T15/06 ,  G06T17/00 ,  G06T17/10

Abstract: Systems and techniques are provided for accelerated ray tracing. For instance, a process can include obtaining a hierarchical acceleration data structure that includes a plurality of primitives of a scene object and obtaining a respective information value associated with each primitive included in the plurality of primitives. A sort order can be determined for two or more nodes included in a same level of the hierarchical acceleration data structure at least in part by sorting the two or more nodes based on a respective sorting parameter value determined for each respective node of the two or more nodes. Each respective sorting parameter value can be determined based on at least one information value associated with one or more primitives included in a sub-tree of each respective node of the two or more nodes. The hierarchical acceleration data structure can be traversed using the sort order.

公开(公告)号：US11893654B2

公开(公告)日：2024-02-06

申请号：US17373704

申请日：2021-07-12

Applicant: QUALCOMM Incorporated

Inventor： Sreyas Kurumanghat ,  Kalyan Kumar Bhiravabhatla ,  Andrew Evan Gruber ,  Tao Wang ,  Baoguang Yang ,  Pavan Kumar Akkaraju

IPC: G06T1/20 ,  G06T1/60 ,  G06T15/40

CPC classification number: G06T1/20 ,  G06T1/60 ,  G06T15/405

Abstract: The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may configure a portion of a GPU to include at least one depth processing block, the at least one depth processing block being associated with at least one depth buffer. The apparatus may also identify one or more depth passes of each of a plurality of graphics workloads, the plurality of graphics workloads being associated with a plurality of frames. Further, the apparatus may process each of the one or more depth passes in the portion of the GPU including the at least one depth processing block, each of the one or more depth passes being processed by the at least one depth processing block, the one or more depth passes being associated with the at least one depth buffer.

公开(公告)号：US11631215B2

公开(公告)日：2023-04-18

申请号：US16816150

申请日：2020-03-11

Applicant: QUALCOMM Incorporated

Inventor： Andrew Evan Gruber ,  Krishnaiah Gummidipudi ,  Pavan Kumar Akkaraju ,  Kalyan Kumar Bhiravabhatla ,  Ankit Kumar Singh ,  Sharad Raj

IPC: G06T15/50 ,  G06T1/20 ,  G06T15/00 ,  G06T7/00 ,  G06T17/10 ,  G06T17/20

Abstract: The present disclosure relates to methods and apparatus for graphics processing. The present disclosure can calculate a center-edge distance of a first pixel, the center-edge distance of the first pixel equal to a distance from a first pixel center to one or more edges of a first primitive. Additionally, the present disclosure can store the center-edge distance of the first pixel when the first primitive is visible in a scene. The present disclosure can also determine an amount of overlap between the first pixel and the first primitive. Further, the present disclosure can blend a color of the first pixel with a color of a second pixel based on at least one of the center-edge distance of the first pixel or the amount of overlap between the first pixel and the first primitive.