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公开(公告)号:US20250156396A1
公开(公告)日:2025-05-15
申请号:US18509115
申请日:2023-11-14
Applicant: QUALCOMM Incorporated
Inventor: Richard SENIOR , Sundeep KUSHWAHA , Scott Russell BAUER , Gurvinder Singh CHHABRA , Norris GENG , Christopher KOOB , Sergei LARIN , Vipin SALI , Murali SOMANCHY , Aleksandr Sergeevich TARASIKOV
Abstract: Aspects of the disclosure are directed to data integrity detection. In accordance with one aspect, an apparatus including a compressed data sector configured to store a compressed data; a meta data sector coupled to the compressed data sector, the meta data sector configured to indicate an invalid meta data index; and a compression/decompression engine coupled to the meta data sector, the compression/decompression engine configured to compress an original data to generate the compressed data and further configured to decompress the compressed data to generate a decompressed data.
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2.
公开(公告)号:US20250165143A1
公开(公告)日:2025-05-22
申请号:US18513393
申请日:2023-11-17
Applicant: QUALCOMM Incorporated
Inventor: Kan WANG , Norris GENG , Richard SENIOR , Christopher KOOB , Pranav VERMA , Suresh Kumar VENKUMAHANTI , Gurvinder Singh CHHABRA
IPC: G06F3/06
Abstract: A method for reducing a memory footprint of data stored in a compressed memory subsystem is described. The method includes selecting a read/write data to store in the compressed memory subsystem. The method also includes searching a first compressed data storage pool of the compressed memory subsystem corresponding to a compressed size of the read/write data to identify a first free data block. The method further includes storing the read/write data in a second free data block from a second compressed data storage pool of the compressed memory subsystem corresponding to a compressed size of the read/write data if the first compressed data storage pool is exhausted.
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3.
公开(公告)号:US20230236979A1
公开(公告)日:2023-07-27
申请号:US17572472
申请日:2022-01-10
Applicant: QUALCOMM Incorporated
Inventor: Norris GENG , Richard SENIOR , Gurvinder Singh CHHABRA , Kan WANG
IPC: G06F12/084 , G06F12/0811 , G06F3/06
CPC classification number: G06F12/084 , G06F3/0608 , G06F3/0659 , G06F3/0679 , G06F12/0811
Abstract: A compressed memory system includes a memory region that includes cache lines having priority levels. The compressed memory system also includes a compressed memory region that includes compressed cache lines. Each compressed cache line includes a first set of data bits configured to hold, in a first direction, either a portion of a first cache line or a portion of the first cache line after compression, the first cache line having a first priority level. Each compressed cache line also includes a second set of data bits configured to hold, in a second direction opposite to the first direction, either a portion of a second cache line or a portion of the second cache line after compression, the second cache line having a priority level lower than the first priority level. The first set of data bits includes a greater number of bits than the second set of data bits.
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4.
公开(公告)号:US20230236961A1
公开(公告)日:2023-07-27
申请号:US17572471
申请日:2022-01-10
Applicant: QUALCOMM Incorporated
Inventor: Norris GENG , Richard SENIOR , Gurvinder Singh CHHABRA , Kan WANG
IPC: G06F12/02
CPC classification number: G06F12/023 , G06F2212/401
Abstract: A compressed memory system of a processor-based system includes a memory partitioning circuit for partitioning a memory region into data regions with different priority levels. The system also includes a cache line selection circuit for selecting a first cache line from a high priority data region and a second cache line from a low priority data region. The system also includes a compression circuit for compressing the cache lines to obtain a first and a second compressed cache line. The system also includes a cache line packing circuit for packing the compressed cache lines such that the first compressed cache line is written to a first predetermined portion and the second cache line or a portion of the second compressed cache line is written to a second predetermined portion of the candidate compressed cache line. The first predetermined portion is larger than the second predetermined portion.
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