公开(公告)号：US10176139B2

公开(公告)日：2019-01-08

申请号：US15595579

申请日：2017-05-15

Applicant: QUALCOMM Incorporated

Inventor： Ron Keidar ,  Osman Koyuncu ,  Michael Batenburg

IPC: G06F13/40 ,  G06F9/455 ,  G06F9/50 ,  G06F21/82

Abstract: System and method for providing adaptive access to a hardware block on a computer system. In one embodiment, a method includes receiving a first access request and a second access request with an access controller, wherein the second access request is received sequentially after the first access request, and the first access request includes a first master identification and the second access request includes a second master identification, determining if the second master identification is equal to the first master identification, providing access to the second access request if the second master identification is equal to the first master identification, wherein the first master identification is associated with one or more hardware block interface values, invalidating the one or more hardware block interface values associated with the first master identification if the second master identification is not equal to the first master identification, and associating the one or more hardware block interface values with the second master identification and a corresponding privilege.

公开(公告)号：US09767063B2

公开(公告)日：2017-09-19

申请号：US14638669

申请日：2015-03-04

Applicant: QUALCOMM Incorporated

Inventor： Ron Keidar ,  Osman Koyuncu ,  Michael Batenburg

IPC: G06F13/40 ,  G06F9/455 ,  G06F9/50 ,  G06F21/82

CPC classification number: G06F13/4068 ,  G06F9/45558 ,  G06F9/5077 ,  G06F13/40 ,  G06F21/82 ,  G06F2009/45579

Abstract: System and method for providing adaptive access to a hardware block on a computer system. In one embodiment, a method includes receiving a first access request and a second access request with an access controller, wherein the second access request is received sequentially after the first access request, and the first access request includes a first master identification and the second access request includes a second master identification, determining if the second master identification is equal to the first master identification, providing access to the second access request if the second master identification is equal to the first master identification, wherein the first master identification is associated with one or more hardware block interface values, invalidating the one or more hardware block interface values associated with the first master identification if the second master identification is not equal to the first master identification, and associating the one or more hardware block interface values with the second master identification and a corresponding privilege.

公开(公告)号：US08908464B2

公开(公告)日：2014-12-09

申请号：US13765559

申请日：2013-02-12

Applicant: QUALCOMM Incorporated

Inventor： Gregory Ameriada Uvieghara ,  Michael Batenburg ,  Esin Terzioglu ,  Yucong Tao

IPC: G11C5/14 ,  G01R31/36

CPC classification number: G11C5/143 ,  G01R31/31719 ,  G01R31/3658 ,  G11C7/24

Abstract: Systems and methods for detecting power attacks related to subnormal read voltage on an integrated circuit. Upon initiating power up of the integrated circuit and prior to reading configuration information from non-volatile memory (NVM), test cells associated with the NVM are read first. The test cells share a common power supply with the NVM and output read values from the test cells are configured to deviate from values pre-programmed in the test cells when a subnormal read voltage is applied on the common power supply. Thus, by comparing the output read values with the pre-programmed values, it can be determined whether voltage of the common power supply is subnormal, wherein configuration information will be read incorrectly at a subnormal read voltage. If the voltage is subnormal, power up is aborted. Otherwise, power up is allowed to proceed by reading the configuration information from the NVM.

Abstract translation: 用于检测与集成电路上的次正常读取电压相关的电源攻击的系统和方法。 在启动集成电路的电源并且在从非易失性存储器（NVM）读取配置信息之前，首先读取与NVM相关联的测试单元。 测试单元与NVM共用公共电源，并且当在公共电源上施加次正常读取电压时，来自测试单元的输出读取值被配置为偏离测试单元中预编程的值。 因此，通过将输出读取值与预编程值进行比较，可以确定公共电源的电压是否是次正常，其中配置信息将在非正常读取电压下读取不正确。 如果电压低于正常值，则上电将中止。 否则，可以通过从NVM读取配置信息来上电。

公开(公告)号：US20140226426A1

公开(公告)日：2014-08-14

申请号：US13765559

申请日：2013-02-12

Applicant: QUALCOMM INCORPORATED

Inventor： Gregory Ameriada Uvieghara ,  Michael Batenburg ,  Esin Terzioglu ,  Yucong Tao

IPC: G11C5/14

CPC classification number: G11C5/143 ,  G01R31/31719 ,  G01R31/3658 ,  G11C7/24

Abstract: Systems and methods for detecting power attacks related to subnormal read voltage on an integrated circuit. Upon initiating power up of the integrated circuit and prior to reading configuration information from non-volatile memory (NVM), test cells associated with the NVM are read first. The test cells share a common power supply with the NVM and output read values from the test cells are configured to deviate from values pre-programmed in the test cells when a subnormal read voltage is applied on the common power supply. Thus, by comparing the output read values with the pre-programmed values, it can be determined whether voltage of the common power supply is subnormal, wherein configuration information will be read incorrectly at a subnormal read voltage. If the voltage is subnormal, power up is aborted. Otherwise, power up is allowed to proceed by reading the configuration information from the NVM.

Abstract translation: 用于检测与集成电路上的次正常读取电压相关的电源攻击的系统和方法。 在启动集成电路的电源并且在从非易失性存储器（NVM）读取配置信息之前，首先读取与NVM相关的测试单元。 测试单元与NVM共用公共电源，并且当在公共电源上施加次正常读取电压时，来自测试单元的输出读取值被配置为偏离测试单元中预编程的值。 因此，通过将输出读取值与预编程值进行比较，可以确定公共电源的电压是否是次正常，其中配置信息将在非正常读取电压下读取不正确。 如果电压低于正常值，则上电将中止。 否则，可以通过从NVM读取配置信息来上电。