公开(公告)号：US20190065384A1

公开(公告)日：2019-02-28

申请号：US15683350

申请日：2017-08-22

Applicant: QUALCOMM Incorporated

Inventor： Rami Mohammad AL SHEIKH ,  Shivam PRIYADARSHI ,  Brandon DWIEL ,  David John PALFRAMAN ,  Derek HOWER

IPC: G06F12/0875 ,  G06F12/084 ,  G06F12/0811

Abstract: A request to access data at a first physical address misses in a private cache of a processor. A confidence value is received for the first physical address based on a hash value of the first physical address. A determination is made that the received confidence value exceeds a threshold value. In response, a speculative read request specifying the first physical address is issued to a memory controller of a main memory to expedite a miss for the data at the first physical address in a shared cache.

公开(公告)号：US20190065375A1

公开(公告)日：2019-02-28

申请号：US15683391

申请日：2017-08-22

Applicant: QUALCOMM Incorporated

Inventor： Rami Mohammad AL SHEIKH ,  Shivam PRIYADARSHI ,  Brandon DWIEL ,  David John PALFRAMAN ,  Derek HOWER ,  Muntaquim Faruk CHOWDHURY

IPC: G06F12/0862 ,  G06F12/0875 ,  G06F12/109 ,  G06F12/1045

Abstract: A first load instruction specifying a first virtual address misses in a data cache. A delta value is received based on a program counter value of the first load instruction. A second virtual address is computed based on the delta value and the first virtual address. Data associated with the second virtual address is then prefetched from a main memory to the data cache prior to a second load instruction specifying the second virtual address missing in the data cache.