公开(公告)号：US20240296702A1

公开(公告)日：2024-09-05

申请号：US18176902

申请日：2023-03-01

Applicant: QUALCOMM INCORPORATED

Inventor： Amit ANEJA ,  Rahul GULATI ,  Sriram HARIHARAN

IPC: G07C5/08 ,  G01R31/00

CPC classification number: G07C5/0808 ,  G01R31/007 ,  B60R16/023 ,  B60W50/0225

Abstract: Fail-safe and Fail-operational behavior can be achieved by providing two fully-redundant execution channels comprising at least first and second chiplet dies on a single SoC that are in communication with one another via a D2D interface. At least first and second instances of a first automotive safety integrity level (ASIL) domain circuit disposed on the at least first and second chiplet dies, respectively, perform at least a first ASIL domain process on one or more automotive sensor output signals to produce first and second output signals, respectively. A fault monitoring system monitors at least the first chiplet die for faults and assigns a first value to a selector signal if it detects a fault in the first chiplet die. A selector circuit outputs the second output signal from the system if the selector signal has the first value.