公开(公告)号：US20200058330A1

公开(公告)日：2020-02-20

申请号：US16103319

申请日：2018-08-14

Applicant: QUALCOMM INCORPORATED

Inventor： PAWAN CHHABRA ,  VENKATA DEVARASETTY ,  MAYANK GUPTA ,  MAHESHWAR THAKUR SINGH ,  HARSHIT TIWARI

IPC: G11C5/14 ,  G06F1/32 ,  G11C11/4074 ,  G11C11/4076 ,  G11C7/20

Abstract: Systems and methods are disclosed for providing micro-idle memory power management. One embodiment of a method comprises receiving and storing an exit latency vote from each of a plurality of memory subsystems on a system on chip electrically coupled to a system memory. In response to a micro-idle memory state in which each of the memory subsystems are idle, a minimum exit latency value from the plurality of exit latency votes is determined. One of a plurality of system memory modes is selected which has a micro-idle sleep time that meets the minimum exit latency value while minimizing system memory power consumption. The selected system memory mode is initiated.