公开(公告)号：US20180018292A1

公开(公告)日：2018-01-18

申请号：US15209416

申请日：2016-07-13

Applicant: QUALCOMM INCORPORATED

Inventor： KIRAN KUMAR MALIPEDDI ,  YOSSI AMON ,  GRAHAM ROFF ,  CHRISTOPHER KONG YEE CHUN ,  RAJESH CHAVA

IPC: G06F13/24 ,  G06F1/32 ,  G06F1/24

CPC classification number: G06F13/24 ,  G06F1/24 ,  G06F1/3206 ,  G06F13/42

Abstract: Systems and methods are disclosed for resolving bus hang in a computing device. An exemplary system comprises a bus operating in accordance with an interface clock, and a controller in communication with the bus. The controller comprises a finite state machine, where the finite state machine is configured to receive a clock signal from the interface clock and a command signal originating external to the controller. The controller also comprising hang detection logic configured to receive one or more signals that the finite state machine is active, monitor the interface clock, and generate an event notification in response to the interface clock turning off while the finite state machine is active. The controller further comprises a trap handler in communication with the hang detection logic, the trap handler configured to send an interrupt in response to the event notification.

公开(公告)号：US20170277238A1

公开(公告)日：2017-09-28

申请号：US15077949

申请日：2016-03-23

Applicant: QUALCOMM INCORPORATED

Inventor： HEE JUN PARK ,  TAEWOO KWAK ,  CHRISTOPHER KONG YEE CHUN

IPC: G06F1/26

CPC classification number: G06F1/266 ,  G06F1/263

Abstract: Systems, methods, and computer programs are provided for controlling power in a computing device. One embodiment is a system comprising a plurality of power rails coupled to one or more computing device components. Each power rail has a primary power supply for producing current at a corresponding requested voltage. The system further comprises a shared secondary power supply selectively coupled to the plurality of power rails for providing a current increase. A controller selects one of the plurality of power rails to receive the current increase. The controller generates a control signal to electrically couple the shared secondary power supply to the selected power rail to receive the current increase.

公开(公告)号：US20190227968A1

公开(公告)日：2019-07-25

申请号：US16106118

申请日：2018-08-21

Applicant: QUALCOMM INCORPORATED

Inventor： CHRISTOPHER KONG YEE CHUN ,  CHRIS ROSOLOWSKI

IPC: G06F13/362 ,  G06F13/42 ,  G06F1/28

CPC classification number: G06F13/362 ,  G06F1/28 ,  G06F13/4282

Abstract: Systems and methods are disclosed method for operating a serial interconnect of a computer system in a time deterministic manner. An exemplary method comprises that a command to be sent over the serial interconnect in a transaction is to be executed at a specific time. A delay period for the command to be sent from a master of the computer system to a slave of the computer system via the serial bus is determined, where the delay period determined based on a length of an arbitration phase of the transaction. The command is then sent to the slave of the computer system via the serial bus after the delay period.