公开(公告)号：US08493160B2

公开(公告)日：2013-07-23

申请号：US12745035

申请日：2008-11-27

Applicant: Pierre Nicole ,  Alain Phommahaxay ,  Gaelle Lissorgues

Inventor： Pierre Nicole ,  Alain Phommahaxay ,  Gaelle Lissorgues

IPC: H01P1/22

CPC classification number: H03G11/002 ,  H03G11/004

Abstract: The present invention relates to an electromagnetic signal power limiter and its design method. The power limiter for an electromagnetic signal includes at least one transmission line for the signal. The transmission line is made up of a number of passive micro-diodes with ballistic electron transport. The micro-diodes are distributed on the transmission line, and are implemented in a controlled atmosphere. The invention applies notably to radiofrequency or hyperfrequency waves received by detection and communication devices.

Abstract translation: 本发明涉及一种电磁信号功率限制器及其设计方法。 用于电磁信号的功率限制器包括用于该信号的至少一个传输线。 传输线由多个具有弹道电子传输的无源微型二极管组成。 微型二极管分布在传输线上，并在受控的气氛中实现。 本发明特别适用于由检测和通信设备接收的射频或超频波。

公开(公告)号：US20110057740A1

公开(公告)日：2011-03-10

申请号：US12745035

申请日：2008-11-27

Applicant: Pierre Nicole ,  Alain Phommahaxay ,  Gaelle Lissorgues

Inventor： Pierre Nicole ,  Alain Phommahaxay ,  Gaelle Lissorgues

IPC: H03G11/02

CPC classification number: H03G11/002 ,  H03G11/004

Abstract: The present invention relates to an electromagnetic signal power limiter and its design method. The power limiter for an electromagnetic signal includes at least one transmission line for the signal. The transmission line is made up of a number of passive micro-diodes with ballistic electron transport. The micro-diodes are distributed on the transmission line, and are implemented in a controlled atmosphere. The invention applies notably to radiofrequency or hyperfrequency waves received by detection and communication devices.

Abstract translation: 本发明涉及一种电磁信号功率限制器及其设计方法。 用于电磁信号的功率限制器包括用于该信号的至少一个传输线。 传输线由多个具有弹道电子传输的无源微型二极管组成。 微型二极管分布在传输线上，并在受控的气氛中实现。 本发明特别适用于由检测和通信设备接收的射频或超频波。

公开(公告)号：US20100216308A1

公开(公告)日：2010-08-26

申请号：US12711544

申请日：2010-02-24

Applicant: Patrick Verdonck ,  Marc Van Cauwenberghe ,  Alain Phommahaxay ,  Ricardo Cotrin Teixeira ,  Nina Tutunjyan

Inventor： Patrick Verdonck ,  Marc Van Cauwenberghe ,  Alain Phommahaxay ,  Ricardo Cotrin Teixeira ,  Nina Tutunjyan

IPC: H01L21/304

CPC classification number: H01L21/304 ,  H01L21/02057 ,  H01L21/3065

Abstract: A method is provided for producing 3D structures in a semiconductor substrate using Deep Reactive Ion Etching (DRIE), comprising at least the steps of: providing a substrate, and then grinding the backside of the substrate in order to achieve a thinned substrate, wherein extrusions and native oxides are left after said grinding step, and then performing a surface treatment selected from the group consisting of a wet etching step and a dry etching step in order to remove at least said native oxides and extrusions on the surface of said backside of the substrate which are causes for the grass formation during subsequent etching, and then performing deep reactive ion etching in order to achieve 3D vias.

Abstract translation: 提供了一种用于使用深度反应离子蚀刻（DRIE）在半导体衬底中生产3D结构的方法，其包括至少以下步骤：提供衬底，然后研磨衬底的背面，以便实现薄化衬底，其中， 并且在所述研磨步骤之后留下天然氧化物，然后进行选自湿蚀刻步骤和干蚀刻步骤的表面处理，以便除去所述背面的表面上的至少所述天然氧化物和挤出物 底物，其是在随后的蚀刻期间引起草的形成，然后进行深反应离子蚀刻以实现3D通孔。

公开(公告)号：US20120126391A1

公开(公告)日：2012-05-24

申请号：US13292261

申请日：2011-11-09

Applicant: Alain Phommahaxay ,  Lieve Bogaerts ,  Philippe Soussan

Inventor： Alain Phommahaxay ,  Lieve Bogaerts ,  Philippe Soussan

IPC: H01L23/04 ,  H01L21/52

CPC classification number: B81C1/00896 ,  B81C2203/0109 ,  B81C2203/035

Abstract: Disclosed are methods for forming semiconductor devices and the semiconductor devices thus obtained. In one embodiment, the method may include providing a semiconductor wafer comprising a surface, forming on the surface at least one device, forming a release layer at least in an area of the surface that encircles the at least one device, forming on the release layer at least one wall structure around the at least one device, and forming at least one cap on the at least one wall structure. In one embodiment, the device may include a substrate comprising a surface, at least one device formed on the surface, a release layer formed at least in an area of the surface that encircles the at least one device, at least one wall structure formed around the at least one device, and at least one removable cap formed on the at least one wall structure.

Abstract translation: 公开了用于形成如此获得的半导体器件和半导体器件的方法。 在一个实施例中，该方法可以包括提供包括表面的半导体晶片，在表面上形成至少一个器件，在至少在包围至少一个器件的表面的区域中形成释放层，形成在释放层 围绕所述至少一个装置的至少一个壁结构，以及在所述至少一个壁结构上形成至少一个盖。 在一个实施例中，该装置可以包括一个包括一个表面的基底，至少一个在该表面上形成的装置，至少在该表面的区域中形成的剥离层，该释放层环绕该至少一个装置，至少一个壁结构 所述至少一个装置以及形成在所述至少一个壁结构上的至少一个可拆卸盖。

公开(公告)号：US09061897B2

公开(公告)日：2015-06-23

申请号：US13292261

申请日：2011-11-09

Applicant: Alain Phommahaxay ,  Lieve Bogaerts ,  Philippe Soussan

Inventor： Alain Phommahaxay ,  Lieve Bogaerts ,  Philippe Soussan

IPC: H01L23/12 ,  B81C1/00

CPC classification number: B81C1/00896 ,  B81C2203/0109 ,  B81C2203/035

Abstract: Disclosed are methods for forming semiconductor devices and the semiconductor devices thus obtained. In one embodiment, the method may include providing a semiconductor wafer comprising a surface, forming on the surface at least one device, forming a release layer at least in an area of the surface that encircles the at least one device, forming on the release layer at least one wall structure around the at least one device, and forming at least one cap on the at least one wall structure. In one embodiment, the device may include a substrate comprising a surface, at least one device formed on the surface, a release layer formed at least in an area of the surface that encircles the at least one device, at least one wall structure formed around the at least one device, and at least one removable cap formed on the at least one wall structure.

Abstract translation: 公开了用于形成如此获得的半导体器件和半导体器件的方法。 在一个实施例中，该方法可以包括提供包括表面的半导体晶片，在表面上形成至少一个器件，在至少在包围至少一个器件的表面的区域中形成释放层，形成在释放层上 围绕所述至少一个装置的至少一个壁结构，以及在所述至少一个壁结构上形成至少一个盖。 在一个实施例中，该装置可以包括一个包括一个表面的基底，至少一个在该表面上形成的装置，至少在该表面的区域中形成的剥离层，该释放层环绕该至少一个装置，至少一个壁结构 所述至少一个装置以及形成在所述至少一个壁结构上的至少一个可拆卸盖。