公开(公告)号：US20230197711A1

公开(公告)日：2023-06-22

申请号：US17995972

申请日：2021-04-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Shoichi GOTO ,  Koji OBATA ,  Masaru SASAGO ,  Masamichi NAKAGAWA

IPC: H01L27/06 ,  H01L25/065 ,  G11C5/02 ,  H01L27/02 ,  G06N3/065

CPC classification number: H01L27/0688 ,  H01L25/0657 ,  G11C5/02 ,  H01L27/0207 ,  G06N3/065

Abstract: An artificial intelligence (AI) chip includes: a plurality of memory dies each for storing data; a plurality of computing dies each of which performs a computation included in an AI process; and a system chip that controls the plurality of memory dies and the plurality of computing dies. Each of the plurality of memory dies has a first layout pattern. Each of the plurality of computing dies has a second layout pattern. A second memory die which is one of the plurality of memory dies is stacked above the first layout pattern of a first memory die which is one of the plurality of memory dies. A second computing die which is one of the plurality of computing dies is stacked above the second layout pattern of a first computing die which is one of the plurality of computing dies.