公开(公告)号：US09922899B2

公开(公告)日：2018-03-20

申请号：US15408718

申请日：2017-01-18

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi Harikai ,  Shogo Okita ,  Noriyuki Matsubara ,  Mitsuru Hiroshima ,  Mitsuhiro Okune

IPC: H01L23/31 ,  H01L21/78 ,  H01L23/544 ,  H01L21/3065 ,  H01L21/02 ,  H01L23/29

CPC classification number: H01L23/3178 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31138 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/293 ,  H01L23/3185 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2223/5446

Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into the element chips by exposing the substrate to first plasma. Therefore, the element chips having a first surface, a second surface, and a side surface on which a plurality of convex portions are formed are held spaced from each other on a carrier. A protection film is formed on the side surface of the element chip by exposing the element chip to second plasma, at least convex portions formed on the side surface are covered by the protection film in the protection film formation, and creep-up of a conductive material to the side surface is suppressed in the mounting step.

公开(公告)号：US09698073B2

公开(公告)日：2017-07-04

申请号：US15264921

申请日：2016-09-14

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi Harikai ,  Shogo Okita ,  Noriyuki Matsubara ,  Mitsuru Hiroshima ,  Mitsuhiro Okune

IPC: H01L21/318 ,  H01L21/78 ,  H01L21/683 ,  H01L23/31 ,  H01L21/02 ,  H01L23/29

CPC classification number: H01L23/3185 ,  H01L21/0212 ,  H01L21/6835 ,  H01L21/78 ,  H01L23/293 ,  H01L2221/68327 ,  H01L2221/6834

Abstract: In a plasma processing step in a method of manufacturing an element chip in which a plurality of element chips are manufactured by dividing a substrate, which has a plurality of element regions, the substrate is divided into element chips by exposing the substrate to first plasma. In a protection film forming step of forming a protection film covering a side surface and a second surface by exposing the element chips to second plasma of which raw material gas is mixed gas of carbon fluoride and helium, protection film forming conditions are set such that a thickness of a second protection film of the second surface is greater than a thickness of a first protection film of the side surface.

公开(公告)号：US10475704B2

公开(公告)日：2019-11-12

申请号：US15408703

申请日：2017-01-18

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Atsushi Harikai ,  Shogo Okita ,  Noriyuki Matsubara ,  Mitsuru Hiroshima ,  Mitsuhiro Okune

IPC: H01L21/78 ,  H01L21/683 ,  H01L21/311 ,  H01L21/02 ,  H01L21/3065 ,  H01L23/31 ,  H01L23/29

Abstract: In a plasma processing step that is used in the method of manufacturing the element chip for manufacturing a plurality of element chips by dividing a substrate having a plurality of element regions, the substrate is divided into element chips 10 by exposing the substrate to a first plasma. Therefore, element chips having a first surface, a second surface, and a side surface connecting the first surface and the second surface are held spaced from each other on a carrier. A protection film covering the element chip is formed only on the side surface and it is possible to suppress creep-up of a conductive material to the side surface in the mounting step by exposing the element chips to second plasma in which a mixed gas of fluorocarbon and helium is used as a raw material gas.