公开(公告)号：US20230163055A1

公开(公告)日：2023-05-25

申请号：US17906619

申请日：2021-03-18

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： JUNICHI KIMURA ,  KAZUHIRO KAIBARA ,  NORIMITSU HOZUMI ,  KOUTARO DEGUCHI ,  ATSUSHI MATSUMOTO

IPC: H01L23/498 ,  H01L23/495 ,  H01L23/00

CPC classification number: H01L23/49811 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/32 ,  H01L2224/32225 ,  H01L23/49568

Abstract: A semiconductor module includes: a first switch element; a second switch element; a first conductor that is joined to the source electrode of the first switch element, the first switch element is placed on the first conductor; a second conductor that is joined to the source electrode of the second switch element, the second switch element is placed on the second conductor; a positive electrode conductor connected to the drain electrode of the first switch element; an output conductor connected to the first conductor and the drain electrode of the second switch element; a negative electrode conductor connected to the second conductor; a first control conductor connected to the gate electrode of the first switch element; a second control conductor connected to the gate electrode of the second switch element; a first voltage detection terminal provided on the first conductor; a second voltage detection terminal provided on the second conductor; and an exterior resin part having a polyhedral shape. The first voltage detection terminal and the second voltage detection terminal protrude from different exterior surfaces of the exterior resin part.

公开(公告)号：US20160320244A1

公开(公告)日：2016-11-03

申请号：US15108756

申请日：2015-01-15

Applicant: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.

Inventor： JUNICHI KIMURA ,  MASAHISA NAKAGUCHI ,  SHINICHI KOHDA ,  NORIMITSU HOZUMI

IPC: G01K1/14 ,  G01K1/16 ,  H01L23/367 ,  G01K7/22

CPC classification number: G01K1/14 ,  G01K1/16 ,  G01K7/22 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/34 ,  H01L23/367 ,  H01L23/4334 ,  H01L23/49562 ,  H01L23/49575 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2924/13055 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In an electronic device, A heat spreader is adhered to a surface of the substrate on a side opposite to the lower surface of the substrate (hereinafter referred to as “upper surface”) by an adhesive sheet. The heat spreader supports a power transistor cooperatively with the substrate. The power transistor which is an electrical element and the heat spreader are adhered to each other by an adhesive sheet on an adhering surface on a side opposite to an adhering surface where the heat spreader is adhered to the substrate. A bus bar and the power transistor are adhered to each other by an adhesive sheet on an adhering surface on a side opposite to an adhering surface where the power transistor is adhered to the heat spreader. The thermistor is connected to a lead which is a conductive line, and is disposed on an upper surface side of substrate.

Abstract translation: 在电子设备中，散热器通过粘合片粘附在基板的与表面的下表面相对的一侧的表面上（以下称为“上表面”）。 散热器与基板配合支撑功率晶体管。 作为电气元件的功率晶体管和散热器通过粘合片彼此粘附在与散热器粘附到基板的粘附表面相对的一侧的粘附表面上。 汇流条和功率晶体管通过粘合片在与功率晶体管粘附到散热器的粘附表面相反的一侧上的粘合表面上彼此粘合。 热敏电阻连接到作为导线的引线，并且设置在基板的上表面侧。

公开(公告)号：US20180197802A1

公开(公告)日：2018-07-12

申请号：US15746013

申请日：2017-03-01

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： MASAYUKI NAGAMATSU ,  SHINYA MARUMO ,  JUNICHI KIMURA ,  TATSUYA KUNISATO ,  RYOSUKE USUI

IPC: H01L23/12 ,  H01L23/28 ,  H01L23/50

CPC classification number: H01L23/12 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3142 ,  H01L23/48 ,  H01L23/49503 ,  H01L23/49548 ,  H01L23/50

Abstract: A semiconductor device includes a semiconductor element, a base, and an outer packaging resin. The base has a mounting surface, on which the semiconductor element is mounted, and a groove provided around the semiconductor element on the mounting surface. An outer packaging resin covers the semiconductor element and the base, and is fixed to the base by filling the groove. A bottom of the groove includes a first recess-projection having a first amplitude and a first repetition interval along an extending direction of the groove. The first recess-projection includes a second recess-projection having a second amplitude smaller than the first amplitude and a second repetition interval shorter than the first repetition interval along the extending direction of the groove.

公开(公告)号：US20180145020A1

公开(公告)日：2018-05-24

申请号：US15580457

申请日：2016-07-04

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： SHINICHI KOHDA ,  JUNICHI KIMURA ,  RYOSUKE USUI ,  TOMOHIDE OGURA ,  ATSUSHI WATANABE

IPC: H01L23/50 ,  H01L23/58 ,  H01L23/36 ,  H01L23/495

CPC classification number: H01L23/50 ,  H01L23/36 ,  H01L23/48 ,  H01L23/4951 ,  H01L23/49558 ,  H01L23/49562 ,  H01L23/49568 ,  H01L23/585 ,  H01L24/37 ,  H01L24/40 ,  H01L2224/0603 ,  H01L2224/37147 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/83801 ,  H01L2224/84801 ,  H05K7/20 ,  H01L2924/00014

Abstract: This semiconductor device includes a semiconductor element mounted on a metal layer, first to third connection terminals that are provided on the semiconductor element, a first bus bar bonded to the first connection terminal, and a second bus bar bonded to the second connection terminal. The semiconductor element is bonded to the metal layer, and the first to third connection terminals are disposed on a top surface of the semiconductor element. One end of the first bus bar is bonded to the first connection terminal, another end of the first bus bar is an output unit, one end of the second bus bar is bonded to the second connection terminal, and another end of the second bus bar is bonded to the metal layer. A first surface of the semiconductor element and the second bus bar are at an identical potential.

公开(公告)号：US20160322342A1

公开(公告)日：2016-11-03

申请号：US15108783

申请日：2015-01-07

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： JUNICHI KIMURA ,  MASAHISA NAKAGUCHI ,  FUMITO ITOU ,  NORIMITSU HOZUMI

IPC: H01L25/18 ,  H01L23/31 ,  H01L23/14 ,  H01L23/00 ,  H01L23/50 ,  H01L23/495

CPC classification number: H01L25/18 ,  H01L23/142 ,  H01L23/3107 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/49513 ,  H01L23/49524 ,  H01L23/49534 ,  H01L23/49551 ,  H01L23/49558 ,  H01L23/49562 ,  H01L23/49572 ,  H01L23/49575 ,  H01L23/50 ,  H01L24/32 ,  H01L24/37 ,  H01L24/40 ,  H01L2224/32245 ,  H01L2224/37144 ,  H01L2224/4007 ,  H01L2224/40137 ,  H01L2224/40139 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2924/181 ,  H01L2924/00012

Abstract: A semiconductor device includes a substrate made of metal, a first metal wiring disposed above the substrate, a first semiconductor element and a second semiconductor element disposed above the first metal wiring, and a second metal wiring disposed above the first semiconductor element and the second semiconductor element. Furthermore, the semiconductor device includes a plurality of projections disposed in at least one of a space between each of the first semiconductor element and the second semiconductor element, and the first metal wiring, and a space between each of the first semiconductor element and the second semiconductor element, and the second metal wiring.

Abstract translation: 半导体器件包括由金属制成的衬底，设置在衬底上的第一金属布线，设置在第一金属布线上方的第一半导体元件和第二半导体元件，以及设置在第一半导体元件和第二半导体之上的第二金属布线 元件。 此外，半导体器件包括设置在第一半导体元件和第二半导体元件中的每一个之间的空间中的至少一个以及第一金属布线中的多个突起，以及第一半导体元件和第二半导体元件 半导体元件和第二金属布线。