公开(公告)号：US11112552B2

公开(公告)日：2021-09-07

申请号：US16840932

申请日：2020-04-06

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Seiji Nishiwaki ,  Bunzi Mizuno

IPC: G02B1/14 ,  F21V8/00 ,  H01L31/054 ,  G02B6/42 ,  G02F1/00 ,  G02B5/02

Abstract: A light-guide sheet according to the present disclosure is a light-guide sheet that takes in incident light and waveguides light in a direction intersecting with an incident direction of the incident light inside the light-guide sheet. The light-guide sheet includes: a lower refractive index layer; a light-transmissive layer that is continuously stacked with the lower refractive index layer and has a refractive index that is higher than a refractive index of the lower refractive index layer; and a diffraction grating that is disposed on the light-transmissive layer and changes a travelling direction of the incident light. A pattern of the diffraction grating is divided into a plurality of partial patterns on the light-transmissive layer, and each of the plurality of partial patterns has a concentric circular shape or a concentric polygonal shape.

公开(公告)号：US09911677B2

公开(公告)日：2018-03-06

申请号：US15427548

申请日：2017-02-08

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Bunzi Mizuno ,  Mitsuru Hiroshima ,  Shogo Okita ,  Noriyuki Matsubara ,  Atsushi Harikai

IPC: H01L23/31 ,  H01L21/311 ,  H01L21/428 ,  H01L21/56 ,  H01L21/78 ,  H01L23/544

CPC classification number: H01L23/3192 ,  H01L21/0212 ,  H01L21/02274 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/3086 ,  H01L21/31116 ,  H01L21/31138 ,  H01L21/428 ,  H01L21/561 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3185 ,  H01L23/544 ,  H01L2221/68327 ,  H01L2221/68381 ,  H01L2223/5446

Abstract: A method for manufacturing an element chip includes a protection film etching step of removing a part of the protection film which is stacked on the dividing region and the protection film which is stacked on the element region through etching the protection film anisotropically by exposing the substrate to first plasma and remaining the protection film for covering an end surface of the element region. Furthermore, the method for manufacturing an element chip includes an isotropic etching step of etching the dividing region isotropically by exposing the substrate to second plasma and a plasma dicing step of dividing the substrate to a plurality of element chips including the element region by exposing the substrate to third plasma in a state where the second main surface is supported by a supporting member.

公开(公告)号：US09941167B2

公开(公告)日：2018-04-10

申请号：US15426199

申请日：2017-02-07

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Bunzi Mizuno ,  Shogo Okita ,  Mitsuru Hiroshima ,  Tutomu Sakurai ,  Noriyuki Matsubara

IPC: H01L21/00 ,  H01L21/78 ,  H01L21/67 ,  H01L21/683 ,  H01L21/268 ,  H01L21/3065

CPC classification number: H01L21/78 ,  H01J2237/334 ,  H01L21/268 ,  H01L21/3065 ,  H01L21/30655 ,  H01L21/31116 ,  H01L21/67069 ,  H01L21/67109 ,  H01L21/67115 ,  H01L21/6831

Abstract: The method includes a laser scribing step of forming an opening including an exposing portion, where the first layer is exposed, by irradiating the dividing region of the substrate with laser light from the first main surface side, forming a remaining region on which the second layer in the dividing region remains around the opening other than the exposing portion, and forming a first damaged region of a surface layer portion of the first layer including the exposing portion and a second damaged region of a surface layer portion of the first layer to be covered by the remaining region on the first layer of the dividing region.

公开(公告)号：US10177063B2

公开(公告)日：2019-01-08

申请号：US15426181

申请日：2017-02-07

Applicant: Panasonic Intellectual Property Management Co., Ltd.

Inventor： Bunzi Mizuno ,  Mitsuru Hiroshima ,  Shogo Okita ,  Noriyuki Matsubara ,  Atsushi Harikai

IPC: H01L23/00 ,  H01L23/31 ,  H01L21/268 ,  H01L21/311 ,  H01L21/56 ,  H01L21/78 ,  H01L23/544 ,  H01L21/683 ,  H01L21/02 ,  H01L21/033 ,  H01L21/3065 ,  H01L21/67

Abstract: A method for manufacturing an element chip includes a protection film stacking step of staking a protection film to the element region, and the dividing region, the part of the exposed second damaged region and a protection film etching step of removing a part of the protection film which is stacked on the dividing region and the protection film which is stacked on the element region by exposing the substrate to second plasma and remaining the protection film for covering the part of the second damaged region. Furthermore, the method for manufacturing an element chip includes a plasma dicing step of dividing the substrate to a plurality of element chips by exposing the substrate to third plasma in a state where the second main surface is supported by a supporting member.