公开(公告)号：US11552623B2

公开(公告)日：2023-01-10

申请号：US17560090

申请日：2021-12-22

Applicant: POSTECH Research and Business Development Foundation

Inventor： Jae Yoon Sim ,  Ki Seo Kang

IPC: H03K5/00 ,  H03K4/02 ,  H03K5/01 ,  H03M1/66 ,  H03K4/92

Abstract: The present disclosure provides a device and method of generating a nonlinear waveform signal dissipating low power and operating at a high speed. The device includes: a digital preprocessing unit configured to quantize an effective input signal to generate a linear data signal and a residual signal that is a difference between the effective input signal and the linear data signal; a nonlinear digital-to-analog conversion circuit (DAC) having a nonlinear relationship between an input and an output and configured to convert the linear data signal into a first analog signal; a linear interpolation DAC configured to convert the residual signal into a second analog signal to enable a generation of a converted analog signal by an addition of the second analog signal to the first analog signal; and an output circuit configured to output the converted analog signal as a nonlinear waveform signal.

公开(公告)号：US12166868B2

公开(公告)日：2024-12-10

申请号：US17736986

申请日：2022-05-04

Applicant: POSTECH Research and Business Development Foundation

Inventor： Jae Han Park ,  Jae Yoon Sim

IPC: H04L9/08 ,  H03K19/003

Abstract: An exemplary embodiment of the present disclosure provides a physically unclonable function (PUF) cell capable of exhibiting a stable performance and showing an excellent repeatability while being less affected by environmental factors such as a noise, temperature, and bias voltage. The PUF cell generates an output value by combining a scheme of amplifying a threshold voltage difference and a scheme of amplifying an oscillation frequency difference. In an oscillator that generates oscillation signals of different frequencies, the frequency difference of the oscillation signals is amplified by alternately supplying bias voltages of different magnitudes generated by utilizing the threshold voltage difference to a plurality of stages in the oscillator.

公开(公告)号：US11193962B2

公开(公告)日：2021-12-07

申请号：US16848153

申请日：2020-04-14

Applicant: POSTECH Research and Business Development Foundation

Inventor： Jae Yoon Sim ,  Young Woo Ji

IPC: G05F3/02 ,  G01R19/165 ,  G01R19/17 ,  G05F3/10

Abstract: An electronic circuit includes first to third transistors. The first transistor has a first channel width and a first channel length and generates a first potential difference by passing an operating current based on a first operating voltage. The second transistor has a second channel width and a second channel length and generates a second potential difference based on the operating current. The third transistor generates a third potential difference based on a second operating voltage and the operating current. A sum of a level of the first operating voltage and a level of the first potential difference corresponds to a sum of a level of the second operating voltage, a level of the second potential difference, and a level of the third potential difference. The first channel width is greater than the second channel width, or the first channel length is longer than the second channel length.