公开(公告)号：US3491298A

公开(公告)日：1970-01-20

申请号：US3491298D

申请日：1966-10-31

Applicant: PHILIPS CORP

Inventor： JAGER FRANK DE ,  ZEGERS LEO EDUARD ,  KUILMAN JAN

IPC: H03M5/00 ,  H04B7/17 ,  H04L25/24 ,  H04L25/49 ,  H04B7/18

CPC classification number: H04L25/4925 ,  H03M5/00 ,  H04B7/17 ,  H04L25/242

公开(公告)号：US3654564A

公开(公告)日：1972-04-04

申请号：US3654564D

申请日：1970-06-04

Applicant: PHILIPS CORP

Inventor： TISI FELIZ DANIEL ,  JAGER FRANK DE

IPC: H04L27/00 ,  H04L27/227 ,  H03D3/18

CPC classification number: H04L27/2273 ,  H04L2027/0022 ,  H04L2027/0028 ,  H04L2027/0048 ,  H04L2027/0087

Abstract: The invention relates to a receiver for the reception of information pulse signals transmitted by means of n-phase modulation wherein the original information pulses coincide with different pulses from a series of equidistant clock pulses, the receiver including an n-phase demodulator which is provided with a plurality of parallel arranged synchronous demodulators which are fed by carriers having mutually different reference phases originating from a local carrier generator which is stabilised in phase on the carrier associated with the received signals, signal channels being connected to the outputs of the n-phase demodulator including sampling circuits controlled by a local clock pulse generator the output signal of which sampling circuits characterizes the phase of the received carrier relative to the relevant reference phase of the local carrier at the instants of the local clock pulses, the receiver furthermore being provided with combination circuits connected to the sampling circuits, which combination circuits characterize each of the n-possible phase sectors of the transmitted signals in a phase diagram by means of a separate combination of the outputs of the signal channels. Such receivers are advantageously used in transmission systems which transmit an optimum quantity of information in the available frequency band. To stabilise the local carrier generator on the carrier at the transmitter end, the carrier frequency is transmitted, for example, in conventional manner from the transmitter to the receiver through a separate transmission path or with the aid of a pilot signal added to the information pulse signals to be transmitted.

Abstract translation: 本发明涉及一种用于接收通过n相调制发送的信息脉冲信号的接收机，其中原始信息脉冲与来自一系列等距时钟脉冲的不同脉冲一致，该接收机包括一个n相解调器， 多个并行布置的同步解调器，其由具有相互不同的参考相位的载波馈送，所述基准相源自本地载波发生器，该本地载波发生器在与所接收的信号相关联的载波上同相稳定，信号信道连接到n相解调器的输出 包括由本地时钟脉冲发生器控制的采样电路，其采样电路表征相对于本地时钟脉冲的时刻的本地载波的相关参考相位的接收载波的相位的输出信号，接收器还提供组合 连接到采样卡的电路 电路，这些组合电路通过信号通道的输出的单独组合在相位图中表征发射信号的n个可能的相位扇区中的每一个。

公开(公告)号：US3590386A

公开(公告)日：1971-06-29

申请号：US3590386D

申请日：1969-10-02

Applicant: PHILIPS CORP

Inventor： TISI FELIX DANIEL ,  JAGER FRANK DE

IPC: H04L27/22 ,  H03K5/00 ,  H04J11/00 ,  H04L7/02 ,  H04L7/027 ,  H04L7/033 ,  H04L27/18 ,  H04B1/16 ,  H03K9/02

CPC classification number: H04L7/027 ,  H04L7/0331

Abstract: A receiver for the reception of synchronous information pulse signals provided with a detection device from which a multilevel information pulse signal can be derived, and a local clock pulse generator, and a clock frequency extractor for recovering the clock frequency for synchronizing the local clock pulse generator. In order to recover the clock frequency in its proper phase from the received information pulse signals themselves, a multilevel information pulse signal derived from the detection device is applied according to the invention to a frequency selective circuit included in the clock frequency extractor which circuit is tuned to half the clock frequency and whose output is connected to a nonlinear circuit acting as a frequency doubler which is connected through a normally open electronic switch to the phase-synchronizing circuit of the local clock pulse generator, the electronic switch being controlled by a control circuit including a threshold device to which a signal derived from the frequency selective circuit a applied to produce a control signal for closing the electronic switch when said derived signal exceeds the threshold value of said threshold device.

公开(公告)号：US3378771A

公开(公告)日：1968-04-16

申请号：US37106264

申请日：1964-05-28

Applicant: PHILIPS CORP

Inventor： GERWEN PETRUS JOSEPHUS VAN ,  JAGER FRANK DE

IPC: H04L5/12

CPC classification number: H04L5/12

公开(公告)号：US3649914A

公开(公告)日：1972-03-14

申请号：US3649914D

申请日：1968-10-29

Applicant: PHILIPS CORP

Inventor： JAGER FRANK DE

IPC: H04L5/12 ,  H04B1/00

CPC classification number: H04L5/12

Abstract: A suppressed carrier pulse transmission system features the transmission of the information signals by orthogonal modulation about a central frequency section containing two pilot signals. Because of a selected relationship among the pilot, carrier, and pulse clock frequencies, the receiver features devices, such as mixers, filters, and multipliers, for recovering the carrier and clock frequencies from the pilot signals without frequency or phase distortion.

Abstract translation: 抑制载波脉冲传输系统通过关于包含两个导频信号的中心频率部分的正交调制来传送信息信号。 由于导频，载波和脉冲时钟频率之间的选择关系，接收机具有诸如混频器，滤波器和乘法器之类的器件，用于从导频信号中恢复载波和时钟频率而没有频率或相位失真。

公开(公告)号：US3619789A

公开(公告)日：1971-11-09

申请号：US3619789D

申请日：1968-12-30

Applicant: PHILIPS CORP

Inventor： JAGER FRANK DE ,  GERWEN PETRUS JOSEPHUS VAN

IPC: H04L27/34 ,  H04L27/22 ,  H04B1/10

CPC classification number: H04L27/22

Abstract: A receiver for use with orthogonal modulation signals transmitted along a transmission link having a particular phase shift characteristic features predetection and postdetection phase equalizers. The predetection equalizer produces with the link phase characteristic a symmetrical about the carrier frequency phase characteristic. The postdetection equalizer produces with both the transmission link and predetection equalizer a linear phase characteristic.

公开(公告)号：US3619510A

公开(公告)日：1971-11-09

申请号：US3619510D

申请日：1969-02-19

Applicant: PHILIPS CORP

Inventor： ZEGERS LEO EDUARD ,  JAGER FRANK DE

IPC: H04B14/06 ,  H04J3/06 ,  H04J3/04

CPC classification number: H04B14/062 ,  H04J3/0611

Abstract: A time multiplex transmission system has a pseudorandom synchronization generator coupled to one of the multiplexer inputs. At the receiver, a synchronization detector is coupled to a demultiplexer output. A pulse is generated if there is no synchronization which causes the demultiplexer to lag behind the multiplexer by one channel per sync cycle until synchronization is achieved.