-
公开(公告)号：US20230253422A1
公开(公告)日：2023-08-10
申请号：US18137916
申请日：2023-04-21
Inventor： Masashi MURAKAMI , Kazuko NISHIMURA , Yutaka ABE , Yoshiyuki MATSUNAGA , Yoshihiro SATO , Junji HIRASE
IPC: H01L27/146
CPC classification number: H01L27/14609 , H01L27/14632 , H01L27/14643 , H01L27/14665 , H01L27/14636 , H10K30/00
Abstract: An imaging device including a semiconductor substrate; a photoelectric converter that converts incident light into a signal charge, the photoelectric converter being stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground. The transistor is configured to switch between a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter.
-
公开(公告)号：US20210092316A1
公开(公告)日：2021-03-25
申请号：US17111219
申请日：2020-12-03
Inventor： Motonori ISHII , Yoshiyuki MATSUNAGA , Yutaka HIROSE
IPC: H04N5/363 , H04N5/3745 , H04N5/374 , H04N5/378
Abstract: An imaging device including: a photoelectric converter that generates signal charge; a charge storage region that stores the signal charge; a first transistor that has a gate coupled to the charge storage region and reads out the signal charge; a second transistor that, has a source and a drain, an output of the first transistor being fed back to one of the source and the drain and being supplied to the charge storage region from the other of the source and the drain; and voltage supply circuitry that supplies voltages varying with time. In a reset operation for discharging the signal charge stored in the charge storage region, the voltage supply circuitry supplies the voltages to a gate of the second. transistor so that the second transistor gradually changes from an OFF state to an ON state.
-
公开(公告)号：US20190051693A1
公开(公告)日：2019-02-14
申请号：US16161903
申请日：2018-10-16
Inventor： Kazuko NISHIMURA , Yutaka ABE , Masashi MURAKAMI , Yoshiyuki MATSUNAGA
IPC: H01L27/146 , H04N5/378 , H04N5/357 , H04N5/363
CPC classification number: H01L27/14643 , H04N5/3575 , H04N5/363 , H04N5/378
Abstract: An imaging device having a pixel including a photoelectric converter that generates electric signal; first transistor having a gate coupled to the photoelectric converter; second transistor one of a source and a drain of which is coupled to one of a source and a drain of the first transistor; third transistor one of a source and a drain of which is coupled to the other of the source and the drain of the second transistor, the other of the source and the drain of the third transistor coupled to the photoelectric converter; first capacitor having a first and second ends, the first end coupled to the other of the source and the drain of the second transistor, first reference voltage applied to the second end; and second capacitor having a third and fourth ends, the third end coupled to the first end, the fourth end coupled to the photoelectric converter.
-
公开(公告)号：US20240387570A1
公开(公告)日：2024-11-21
申请号：US18787407
申请日：2024-07-29
Inventor： Masashi MURAKAMI , Kazuko NISHIMURA , Yutaka ABE , Yoshiyuki MATSUNAGA , Yoshihiro SATO , Junji HIRASE
IPC: H01L27/146 , H10K30/00
Abstract: A camera system including a lens; and an imaging device that receives a light through the lens. The imaging device includes: a semiconductor substrate; a photoelectric converter that is configured to convert the light into a signal charge and that is stacked on the semiconductor substrate; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element connected between the transistor and a voltage source or a ground. The transistor is configured to switch between a first state and a second state, a sensitivity in the first state being different from a sensitivity in the second state, and in a cross-sectional view, the capacitive element is located between the semiconductor substrate and the photoelectric converter.
-
公开(公告)号：US20180166479A1
公开(公告)日：2018-06-14
申请号：US15878902
申请日：2018-01-24
Inventor： Masashi MURAKAMI , Kazuko NISHIMURA , Yutaka ABE , Yoshiyuki MATSUNAGA , Yoshihiro SATO , Junji HIRASE
IPC: H01L27/146 , H01L51/42
CPC classification number: H01L27/14609 , H01L27/14632 , H01L27/14636 , H01L27/14643 , H01L27/14665 , H01L51/42
Abstract: An imaging device includes a unit pixel cell including: a photoelectric converter that generates a signal charge through photoelectric conversion of incident light, and a signal detection circuit that detects an electric signal according to an amount of the signal charge, wherein the signal detection circuit includes: a first transistor that amplifies the electric signal, a gate of the first transistor being connected to the photoelectric converter, a second transistor having a source and a drain, one of the source and the drain being connected to the photoelectric converter, and a first capacitor having a first end and a second end, the first end being connected to the other of the source and the drain of the second transistor, the second end being connected to a first voltage source.
-
Patent Agency Ranking
公开(公告)号：US20170094206A1
公开(公告)日：2017-03-30
申请号：US15377613
申请日：2016-12-13
Inventor： Keisuke YAZAWA , Motonori ISHII , Yutaka HIROSE , Yoshihisa KATO , Yoshiyuki MATSUNAGA
CPC classification number: H04N5/363 , H01L27/307 , H04N5/374 , H04N5/3741 , H04N5/3745 , H04N5/378
Abstract: A solid-state imaging apparatus includes a pixel including: a photoelectric converter that generates a signal charge corresponding to incident light; a charge storage section that is connected to the photoelectric converter and accumulates signal charge; a reset transistor; an amplifying transistor; and a cutoff transistor, wherein the amplifying transistor and the cutoff transistor form a negative feedback amplifying circuit.
-
公开(公告)号：US20190075265A1
公开(公告)日：2019-03-07
申请号：US16178396
申请日：2018-11-01
Inventor： Motonori ISHII , Yoshiyuki MATSUNAGA , Yutaka HIROSE
IPC: H04N5/363 , H04N5/3745 , H04N5/374 , H04N5/378
Abstract: An imaging device includes a photoelectric converter generating signal charge; a charge storage region storing the signal charge; a first transistor having a gate coupled to the charge storage region; a second transistor having a source and a drain; and voltage supply circuity supplying voltages varying with time. An output of the first transistor is fed back to the second transistor and is supplied to the charge storage region. A reset operation for discharging the signal charge in the charge storage region includes a first reset operation and a second reset operation. In the first reset operation, the second transistor changes from an OFF state to an ON state and then changes to an OFF state. In the second reset operation, the voltage supply circuity supplies the voltages to a gate of the second transistor so that the second transistor gradually changes from an OFF state to an ON state.
-
公开(公告)号：US20150090998A1
公开(公告)日：2015-04-02
申请号：US14565212
申请日：2014-12-09
Inventor： Junji HIRASE , Yoshiyuki MATSUNAGA , Yoshihiro SATO
IPC: H01L27/146 , H01L51/42
CPC classification number: H01L27/14614 , H01L27/1461 , H01L27/14612 , H01L27/1464 , H01L27/14641 , H01L27/14645 , H01L27/14669 , H01L51/428 , H04N5/363 , H04N5/378
Abstract: Each unit pixel includes a photoelectric converter formed above a semiconductor region, an amplifier transistor formed in the semiconductor region, and including a gate electrode connected to the photoelectric converter, a reset transistor configured to reset a potential of the gate electrode, and an isolation region formed in the semiconductor region between the amplifier transistor and the reset transistor to electrically isolate the amplifier transistor from the reset transistor. The amplifier transistor includes a source/drain region. The source/drain region has a single source/drain structure.
Abstract translation: 每个单位像素包括形成在半导体区域上方的光电转换器，形成在半导体区域中的放大器晶体管，并且包括连接到光电转换器的栅极电极，配置为复位栅电极的电位的复位晶体管，以及隔离区域 形成在放大器晶体管和复位晶体管之间的半导体区域中，以将放大器晶体管与复位晶体管电隔离。 放大器晶体管包括源极/漏极区域。 源极/漏极区域具有单个源极/漏极结构。
-
公开(公告)号：US20230353897A1
公开(公告)日：2023-11-02
申请号：US18212037
申请日：2023-06-20
Inventor： Motonori ISHII , Yoshiyuki MATSUNAGA , Yutaka HIROSE
IPC: H04N25/65 , H04N25/75 , H04N25/77 , H04N25/767
CPC classification number: H04N25/65 , H04N25/75 , H04N25/77 , H04N25/767
Abstract: An imaging device including a photoelectric converter that generates signal charge; a charge storage region that stores the signal charge; a first transistor that has a gate coupled to the charge storage region and reads out the signal charge; a second transistor that has a source and a drain, an output of the first transistor being fed back to one of the source and the drain and being supplied to the charge storage region from the other of the source and the drain; and voltage supply circuitry that supplies voltages varying with time. In a reset operation for discharging the signal charge stored in the charge storage region, the voltage supply circuitry supplies the voltages to a gate of the second transistor.
-
公开(公告)号：US20220320161A1
公开(公告)日：2022-10-06
申请号：US17712873
申请日：2022-04-04
Inventor： Masashi MURAKAMI , Kazuko NISHIMURA , Yutaka ABE , Yoshiyuki MATSUNAGA , Yoshihiro SATO , Junji HIRASE
IPC: H01L27/146
Abstract: An imaging device including: a photoelectric converter that converts incident light into a signal charge; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element. The capacitive element including a first electrode, a second electrode and a dielectric film sandwiched between the first electrode and the second electrode, the first electrode being connected to the other of the source and the drain of the transistor, the second electrode being connected to a voltage source or a ground. The transistor is configured to switch a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode.
-
-
-
-
-
-
-
-
-
Search Results
15
records
(took 0.015 seconds)
