Codec to reduce simultaneously switching outputs
    2.
    发明授权
    Codec to reduce simultaneously switching outputs 有权
    编解码器同时减少切换输出

    公开(公告)号:US09406364B2

    公开(公告)日:2016-08-02

    申请号:US14310269

    申请日:2014-06-20

    CPC classification number: G11C8/10 G06F11/1048 G11C7/1006 G11C8/06

    Abstract: Embodiments of an apparatus and method for encoding data are disclosed that may allow for reduced simultaneous switching output noise. The apparatus may include a row decode circuit, a column decode circuit, and a memory array. The row decode circuit and column decode circuits may be configured to decode a first portion and a second portion, respectively, of a given data word of a first plurality of data words, where each data word may include N data bits, and where N is an integer greater than one. The memory array may be configured to store a second plurality of data words where each data word may include M data bits, and where M is an integer greater than N. The memory array may be further configured to retrieve a given data word of the second plurality of data words dependent upon the decoded first and second portions.

    Abstract translation: 公开了一种用于编码数据的装置和方法的实施例,其可以允许降低的同时开关输出噪声。 该装置可以包括行解码电路,列解码电路和存储器阵列。 行解码电路和列解码电路可以被配置为分别解码第一多个数据字的给定数据字的第一部分和第二部分,其中每个数据字可以包括N个数据位,并且其中N是 大于1的整数。 存储器阵列可以被配置为存储第二多个数据字,其中每个数据字可以包括M个数据位,并且其中M是大于N的整数。存储器阵列还可以被配置为检索第二个数据字的给定数据字 取决于解码的第一和第二部分的多个数据字。

    DIGITAL ENCODING OF PARALLEL BUSSES TO SUPPRESS SIMULTANEOUS SWITCHING OUTPUT NOISE
    3.
    发明申请
    DIGITAL ENCODING OF PARALLEL BUSSES TO SUPPRESS SIMULTANEOUS SWITCHING OUTPUT NOISE 有权
    数字编码并行总线同时抑制同时开关输出噪声

    公开(公告)号:US20160164539A1

    公开(公告)日:2016-06-09

    申请号:US14563485

    申请日:2014-12-08

    CPC classification number: G06F11/1625 G06F11/00 H03M5/00 H03M7/00 H03M13/09

    Abstract: An apparatus and method for encoding data are disclosed that may allow for different encoding levels of transmitted data. The apparatus may include an encoder unit and a plurality of transceiver units. The encoder unit may be configured to receive a plurality of data words, where each data word includes N data bits, wherein N is a positive integer greater than one, and encode a first data word of the plurality of data words. The encoded first data word may include M data bits, where M is a positive integer greater than N. Each transceiver unit may transmit a respective data bit of the encoded first data word. The encoder unit may be further configured to receive information indicative of a quality of transmission of the encoded first data word, and encode a second data word of the plurality of data words dependent upon the quality.

    Abstract translation: 公开了一种用于编码数据的装置和方法,其可以允许发送数据的不同编码级别。 该装置可以包括编码器单元和多个收发器单元。 编码器单元可以被配置为接收多个数据字,其中每个数据字包括N个数据位,其中N是大于1的正整数,并且对多个数据字的第一数据字进行编码。 编码的第一数据字可以包括M个数据位,其中M是大于N的正整数。每个收发器单元可以发送编码的第一数据字的相应数据位。 编码器单元还可以被配置为接收指示编码的第一数据字的传输质量的信息,并且根据质量来编码多个数据字中的第二数据字。

    CODEC TO REDUCE SIMULTANEOUSLY SWITCHING OUTPUTS
    4.
    发明申请
    CODEC TO REDUCE SIMULTANEOUSLY SWITCHING OUTPUTS 有权
    编解码器减少同时切换输出

    公开(公告)号:US20150371693A1

    公开(公告)日:2015-12-24

    申请号:US14310269

    申请日:2014-06-20

    CPC classification number: G11C8/10 G06F11/1048 G11C7/1006 G11C8/06

    Abstract: Embodiments of an apparatus and method for encoding data are disclosed that may allow for reduced simultaneous switching output noise. The apparatus may include a row decode circuit, a column decode circuit, and a memory array. The row decode circuit and column decode circuits may be configured to decode a first portion and a second portion, respectively, of a given data word of a first plurality of data words, where each data word may include N data bits, and where N is an integer greater than one. The memory array may be configured to store a second plurality of data words where each data word may include M data bits, and where M is an integer greater than N. The memory array may be further configured to retrieve a given data word of the second plurality of data words dependent upon the decoded first and second portions.

    Abstract translation: 公开了一种用于编码数据的装置和方法的实施例,其可以允许降低的同时开关输出噪声。 该装置可以包括行解码电路,列解码电路和存储器阵列。 行解码电路和列解码电路可以被配置为分别解码第一多个数据字的给定数据字的第一部分和第二部分,其中每个数据字可以包括N个数据位,并且其中N是 大于1的整数。 存储器阵列可以被配置为存储第二多个数据字,其中每个数据字可以包括M个数据位,并且其中M是大于N的整数。存储器阵列还可以被配置为检索第二个数据字的给定数据字 取决于解码的第一和第二部分的多个数据字。

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