Control apparatus, data structure, and information processing method

    公开(公告)号:US10990084B2

    公开(公告)日:2021-04-27

    申请号:US15900210

    申请日:2018-02-20

    Abstract: A control apparatus that controls a control target is provided. The control apparatus includes: a time manager configured to manage time; a counter configured to synchronize with at least one device; a control computation unit configured to execute control computation according to timing indicated by the counter; and a record generator configured to generate a record that includes an observation value that is available to the control computation unit and is related to the control target, time that is indicated by the time manager and is associated with the observation value, and a counter value that is indicated by the counter and is associated with the observation value.

    Arithmetic operation device and control apparatus

    公开(公告)号:US10606610B2

    公开(公告)日:2020-03-31

    申请号:US15705280

    申请日:2017-09-15

    Abstract: A new configuration for transmitting and receiving multiple types of data having different characteristics using a common communication line is provided. An arithmetic operation device configuring a control apparatus includes: a communication circuit exchanging data with one or multiple functional units through a communication line; a processor that executes a first process used for issuing a first request for transmitting or receiving data through the communication line in every period set in advance and a second process of issuing a second request for transmitting data through the communication line when a condition set in advance is satisfied; and a control circuit that starts to operate the communication circuit in response to the first request and the second request issued by the processor. The control circuit includes a unit that sets a prohibition period in which the second request is invalidated in association with an execution period of the first process.

    Arithmetic operation device and control apparatus for control power supply of arithmetic operation device

    公开(公告)号:US10198058B2

    公开(公告)日:2019-02-05

    申请号:US15705276

    申请日:2017-09-15

    Abstract: An arithmetic operation device configuring a control apparatus includes: a communication circuit that is used for exchanging data with functional units through a communication line; a processor that is used for executing a user program executing at least one of an arithmetic operation process using data acquired from the functional units and a generating process of data to be transmitted to the functional units; and a monitoring circuit that is connected to the communication circuit and the processor. The monitoring circuit gives a notification from the communication circuit to the functional units on the basis of at least one of detection of shutoff of power supplied to the arithmetic operation device and reception of a preliminary notification before the shutoff of the power supplied to the arithmetic operation device, and the notification is used for executing a process according to shutoff of power supply to the arithmetic operation device.

    Control apparatus
    6.
    发明授权

    公开(公告)号:US10274936B2

    公开(公告)日:2019-04-30

    申请号:US14949953

    申请日:2015-11-24

    Abstract: Provided is a control apparatus that can, by causing multiple control programs that include motion computation programs to be executed in parallel, shorten the execution cycle of control programs that are executed cyclically. A microprocessor is configured to execute multiple control programs in parallel. When executing communication commands included in control programs that are to be executed in parallel, a scheduling program causes the microprocessor to execute the communication commands such that there is no competition between communication processes in a communication controller.

    CPU of PLC, system program for PLC, and recording medium storing system program for PLC
    8.
    发明授权
    CPU of PLC, system program for PLC, and recording medium storing system program for PLC 有权
    PLC的CPU,PLC的系统程序和PLC的记录介质存储系统程序

    公开(公告)号:US09568905B2

    公开(公告)日:2017-02-14

    申请号:US14017720

    申请日:2013-09-04

    CPC classification number: G05B19/0426 G05B19/05

    Abstract: A microprocessor controls at least one of a first communication circuit and a second communication circuit such that a first input/output process and a second input/output process are executed in parallel. The first input/output process includes a process outputting output data from a first transfer buffer, through the first communication circuit, to a first instrument in a PLC system bus, and a process inputting input data from the first instrument, through the first communication circuit, to the first transfer buffer. The second input/output process includes a process outputting output data from a second transfer buffer, through the second communication circuit, to a second instrument in a field network, and a process inputting input data from the second instrument, through the second communication circuit, to the second transfer buffer.

    Abstract translation: 微处理器控制第一通信电路和第二通信电路中的至少一个,使得并行执行第一输入/输出处理和第二输入/输出处理。 第一输入/输出处理包括将来自第一传送缓冲器的输出数据通过第一通信电路输出到PLC系统总线中的第一仪器的处理,以及通过第一通信电路输入来自第一仪器的输入数据的处理 ,到第一个传输缓冲区。 第二输入/输出处理包括从第二传送缓冲器通过第二通信电路向现场网络中的第二仪器输出输出数据的处理,以及通过第二通信电路从第二仪器输入输入数据的处理, 到第二个传输缓冲区。

    ARITHMETIC DEVICE AND CONTROL APPARATUS

    公开(公告)号:US20180101383A1

    公开(公告)日:2018-04-12

    申请号:US15705291

    申请日:2017-09-15

    Abstract: An arithmetic device and a control apparatus capable of executing a process according to an event occurring in one or more functional units connected through a communication circuit are provided. The arithmetic device configuring the control apparatus includes: a communication circuit for exchanging data with the functional units through the communication line; a processor for executing at least one of an arithmetic processing using data acquired from the functional units and a generation processing of data to be transmitted to the functional units; and a monitoring circuit connected to the communication circuit and the processor, and includes: a detection unit that detects an event occurring in the arithmetic device; a storage unit that stores a message associated with each event; and a start unit that gives an instruction to the communication circuit in accordance with the detected event to transmit a message associated with the detected event.

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