High dynamic range CMOS image sensor pixel with reduced metal-insulator-metal lateral overflow integration capacitor lag

    公开(公告)号:US12058460B2

    公开(公告)日:2024-08-06

    申请号:US17849325

    申请日:2022-06-24

    Inventor: Woon Il Choi

    CPC classification number: H04N25/75 H01L27/14612 H01L27/14643 H04N25/59

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a bias voltage source and the floating diffusion. The reset transistor is configured to be switched in response to a reset control signal. A lateral overflow integration capacitor (LOFIC) including an insulating region disposed between a first metal electrode and a second metal electrode is also included. The first metal electrode is coupled to a bias voltage source. The second metal electrode is coupled to the reset transistor and selectively coupled to the floating diffusion.

    MULTI-GATE LATERAL OVERFLOW INTEGRATION CAPACITOR SENSOR

    公开(公告)号:US20210183926A1

    公开(公告)日:2021-06-17

    申请号:US16717768

    申请日:2019-12-17

    Abstract: A pixel circuit includes a photodiode, a floating diffusion, and a conduction gate channel of a multi-gate transfer block disposed in a semiconductor material layer. The multi-gate transfer block is coupled to the photodiode, the floating diffusion, and an overflow capacitor. The multi-gate transfer block also includes first, second, and third gates that are disposed proximate to the single conduction gate channel region. The conduction gate channel is a single region shared among the first, second, and third gates. Overflow image charge generated in the photodiode leaks from the photodiode into the conduction gate channel to the overflow capacitor in response to the first gate, which is coupled between the photodiode and the conduction gate channel, receiving a first gate OFF signal and the second gate, which is coupled between the conduction gate channel and the overflow capacitor, receiving a second gate ON signal.

    CHARGE COLLECTION GATE WITH CENTRAL COLLECTION PHOTODIODE IN TIME OF FLIGHT PIXEL

    公开(公告)号:US20210028209A1

    公开(公告)日:2021-01-28

    申请号:US16522496

    申请日:2019-07-25

    Inventor: Woon Il Choi

    Abstract: A pixel circuit includes a photodiode disposed in a semiconductor material layer to accumulate image charge in response to light incident upon the photodiode. A charge collection gate is coupled to the photodiode. The charge collection gate is disposed over the photodiode to generate an inversion layer in the semiconductor material layer under the charge collection gate to collect the image charge from the photodiode. A first transfer gate is disposed proximate to the charge collection gate, wherein the first transfer gate is coupled to transfer the image charge from in the inversion layer in response to a first transfer signal.

    HIGH DYNAMIC RANGE CMOS IMAGE SENSOR PIXEL WITH REDUCED METAL-INSULATOR-METAL LATERAL OVERFLOW INTEGRATION CAPACITOR LAG

    公开(公告)号:US20230421921A1

    公开(公告)日:2023-12-28

    申请号:US17849325

    申请日:2022-06-24

    Inventor: Woon Il Choi

    CPC classification number: H04N5/378 H04N5/3559 H01L27/14643 H01L27/14612

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a bias voltage source and the floating diffusion. The reset transistor is configured to be switched in response to a reset control signal. A lateral overflow integration capacitor (LOFIC) including an insulating region disposed between a first metal electrode and a second metal electrode is also included. The first metal electrode is coupled to a bias voltage source. The second metal electrode is coupled to the reset transistor and selectively coupled to the floating diffusion.

    High dynamic range CMOS image sensor pixel with reduced metal-insulator-metal lateral overflow integration capacitor lag

    公开(公告)号:US11736833B1

    公开(公告)日:2023-08-22

    申请号:US17849354

    申请日:2022-06-24

    Inventor: Woon Il Choi

    CPC classification number: H04N25/77 H04N25/75 H04N25/57

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A transfer transistor is configured to transfer the image charge from the photodiode to a floating diffusion. A reset transistor coupled between a reset voltage source and the floating diffusion. A lateral overflow integration capacitor (LOFIC) includes an insulating region disposed between a first metal electrode and a second metal electrode. The first metal electrode is coupled to a bias voltage source, the second metal electrode is selectively coupled to the floating diffusion, and excess image charge photogenerated by the photodiode during an idle period is configured to overflow from the photodiode through the transfer transistor into the floating diffusion.

    High dynamic range CMOS image sensor pixel with reduced metal-insulator-metal lateral overflow integration capacitor reset settling

    公开(公告)号:US11729526B1

    公开(公告)日:2023-08-15

    申请号:US17808899

    申请日:2022-06-24

    Inventor: Woon Il Choi

    CPC classification number: H04N25/59 H04N25/709 H04N25/75

    Abstract: A pixel circuit includes a transfer transistor coupled between a photodiode and a floating diffusion. A lateral overflow integration capacitor (LOFIC) includes an insulating region disposed between a first metal electrode coupled to a bias voltage source, and a second metal electrode selectively coupled to the floating diffusion. A multifunction reset transistor includes a gate, a drain, a first source, and a second source. The drain, the first source, and the second source are coupled to each other in response to a multifunction reset control signal turning the multifunction reset transistor on. The drain, the first source, and the second source are decoupled from one another in response to the multifunction reset control signal turning the multifunction reset transistor off. The drain is coupled to a reset voltage source, the first source is coupled to the first metal electrode, and the second source is coupled to the second metal electrode.

    LOW NOISE SILICON GERMANIUM IMAGE SENSOR

    公开(公告)号:US20210343882A1

    公开(公告)日:2021-11-04

    申请号:US16863771

    申请日:2020-04-30

    Abstract: Low noise silicon-germanium (SiGe) image sensor. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor substrate. The photodiodes of an individual pixel are configured to receive an incoming light through an illuminated surface of the semiconductor substrate. The semiconductor substrate includes a first layer of semiconductor material having silicon (Si); and a second layer of semiconductor material having silicon germanium (Si1-xGex). A concentration x of Ge changes gradually through at least a portion of thickness of the second layer. Each photodiode includes a first doped region extending through the first layer of semiconductor material and the second layer of semiconductor material; and a second doped region extending through the first layer of semiconductor material and the second layer of semiconductor material.

    TRI-GATE CHARGE TRANSFER BLOCK STRUCTURE IN TIME OF FLIGHT PIXEL

    公开(公告)号:US20210025993A1

    公开(公告)日:2021-01-28

    申请号:US16522493

    申请日:2019-07-25

    Abstract: A pixel circuit includes a photodiode in semiconductor material to accumulate image charge in response to incident light. A tri-gate charge transfer block coupled includes a single shared channel region the semiconductor material. A transfer gate, shutter gate, and switch gate are disposed proximate to the single shared channel region. The transfer gate transfers image charge accumulated in the photodiode to the single shared channel region in response to a transfer signal. The shutter gate transfers the image charge in the single shared channel region to a floating diffusion in the semiconductor material in response to a shutter signal. The switch gate is configured to couple the single shared channel region to a charge storage structure in the semiconductor material in response to a switch signal.

    LOFIC circuit for in pixel metal-insulator-metal(MIM) capacitor lag correction and associated correction methods

    公开(公告)号:US12096141B2

    公开(公告)日:2024-09-17

    申请号:US18154715

    申请日:2023-01-13

    CPC classification number: H04N25/59 H01L27/14612 H01L27/14643 H04N25/771

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A lateral overflow integration capacitor (LOFIC) network is coupled between the reset transistor and a bias voltage source. The LOFIC network includes a main LOFIC coupled between the reset transistor and the bias voltage source, and a plurality of subordinate capacitor-switch pairs, each including a subordinate LOFIC and a switch transistor coupled to the subordinate LOFIC. Each of the plurality of subordinate capacitor-switch pairs is coupled between the reset transistor and the bias voltage source.

    HIGH K METAL-INSULATOR-METAL (MIM) CAPACITOR NETWORK FOR LAG MITIGATION

    公开(公告)号:US20240244350A1

    公开(公告)日:2024-07-18

    申请号:US18154770

    申请日:2023-01-13

    CPC classification number: H04N25/77

    Abstract: A pixel circuit includes a photodiode configured to photogenerate image charge in response to incident light. A floating diffusion is coupled to receive the image charge from the photodiode. A transfer transistor is coupled between the photodiode and the floating diffusion. The transfer transistor is configured to transfer the image charge from the photodiode to the floating diffusion. A reset transistor is coupled between a reset voltage and the floating diffusion. A plurality of capacitor-switch pairs is coupled between the reset transistor and a bias voltage source. Each of the plurality of capacitor-switch pairs includes a lateral overflow integration capacitor (LOFIC) and a switch transistor coupled to the LOFIC.

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