Pad design for circuit under pad in semiconductor devices
    1.
    发明授权
    Pad design for circuit under pad in semiconductor devices 有权
    垫片设计用于半导体器件衬底下的电路

    公开(公告)号:US08729712B2

    公开(公告)日:2014-05-20

    申请号:US14052944

    申请日:2013-10-14

    Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.

    Abstract translation: 半导体器件的实施例包括半导体衬底和设置在半导体衬底中的至少从半导体衬底的第一侧至半导体衬底的第二侧延伸的空腔。 半导体器件还包括设置在半导体衬底的第一侧上并涂覆空腔的侧壁的绝缘层。 包括接合焊盘的导电层设置在绝缘层上。 导电层延伸到空腔中并且连接到设置在半导体衬底的第二侧下方的金属叠层。 贯穿硅通孔焊盘设置在半导体衬底的第二侧下方并连接到金属堆叠。 贯穿硅通孔焊盘的位置是接受硅通孔。

    SEAL RING SUPPORT FOR BACKSIDE ILLUMINATED IMAGE SENSOR
    3.
    发明申请
    SEAL RING SUPPORT FOR BACKSIDE ILLUMINATED IMAGE SENSOR 有权
    背面照明图像传感器的密封圈支撑

    公开(公告)号:US20130122637A1

    公开(公告)日:2013-05-16

    申请号:US13735787

    申请日:2013-01-07

    CPC classification number: H01L27/14643 H01L27/14636 H01L27/1464

    Abstract: A backside illuminated imaging sensor with a seal ring support includes an epitaxial layer having an imaging array formed in a front side of the epitaxial layer. A metal stack is coupled to the front side of the epitaxial layer, wherein the metal stack includes a seal ring formed in an edge region of the imaging sensor. An opening is included that extends from the back side of the epitaxial layer to a metal pad of the seal ring to expose the metal pad. The seal ring support is disposed on the metal pad and within the opening to structurally support the seal ring.

    Abstract translation: 具有密封环支撑件的背面照明成像传感器包括具有形成在外延层的前侧的成像阵列的外延层。 金属叠层耦合到外延层的前侧,其中金属堆叠包括形成在成像传感器的边缘区域中的密封环。 包括从外延层的背面延伸到密封环的金属焊盘以露出金属焊盘的开口。 密封环支撑件设置在金属垫上并且在开口内,以在结构上支撑密封环。

    CMOS Image Sensor With Integrated Silicon Color Filters
    4.
    发明申请
    CMOS Image Sensor With Integrated Silicon Color Filters 审中-公开
    具有集成硅滤色片的CMOS图像传感器

    公开(公告)号:US20140374862A1

    公开(公告)日:2014-12-25

    申请号:US13921901

    申请日:2013-06-19

    Abstract: A color photosensor array has photosensors of a first type having a thick overlying silicon layer, photosensors of a second type having a thin overlying silicon layer, and photosensors of a third type having no overlying silicon layer; the photosensors of the first type having peak sensitivity in the red, the photosensors of the second type having peak sensitivity in the green. In particular embodiments, color correction circuitry is provided to enhance color saturation.

    Abstract translation: 彩色光电传感器阵列具有第一类型的光电传感器,其具有厚的上覆硅层,具有薄的上覆硅层的第二类型的光电传感器和不具有上覆硅层的第三类型的光电传感器; 第一类型的光电传感器在红色中具有峰值灵敏度,第二类型的光电传感器在绿色中具有峰值灵敏度。 在特定实施例中,提供颜色校正电路以增强色彩饱和度。

    PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES
    5.
    发明申请
    PAD DESIGN FOR CIRCUIT UNDER PAD IN SEMICONDUCTOR DEVICES 有权
    用于在半导体器件中的电路下的电路的PAD设计

    公开(公告)号:US20140035089A1

    公开(公告)日:2014-02-06

    申请号:US14052944

    申请日:2013-10-14

    Abstract: Embodiments of a semiconductor device that includes a semiconductor substrate and a cavity disposed in the semiconductor substrate that extends at least from a first side of the semiconductor substrate to a second side of the semiconductor substrate. The semiconductor device also includes an insulation layer disposed over the first side of the semiconductor substrate and coating sidewalls of the cavity. A conductive layer including a bonding pad is disposed over the insulation layer. The conductive layer extends into the cavity and connects to a metal stack disposed below the second side of the semiconductor substrate. A through silicon via pad is disposed below the second side of the semiconductor substrate and connected to the metal stack. The through silicon via pad is position to accept a through silicon via.

    Abstract translation: 半导体器件的实施例包括半导体衬底和设置在半导体衬底中的至少从半导体衬底的第一侧至半导体衬底的第二侧延伸的空腔。 半导体器件还包括设置在半导体衬底的第一侧上并涂覆空腔的侧壁的绝缘层。 包括接合焊盘的导电层设置在绝缘层上。 导电层延伸到空腔中并且连接到设置在半导体衬底的第二侧下方的金属叠层。 贯穿硅通孔焊盘设置在半导体衬底的第二侧下方并连接到金属堆叠。 贯穿硅通孔焊盘的位置是接受硅通孔。

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