公开(公告)号：US20050091562A1

公开(公告)日：2005-04-28

申请号：US10710451

申请日：2004-07-12

Applicant: Nikila KRISHNAMOORTHY ,  Anindya SAHA ,  Rubin PAREKHJI

Inventor： Nikila KRISHNAMOORTHY ,  Anindya SAHA ,  Rubin PAREKHJI

IPC: G01R31/3185 ,  G01R31/28

CPC classification number: G01R31/318563

Abstract: Testing of modules (such as Intellectual property (IP) cores) in integrated circuits (such as system on a chip units (SOCs)) in situations when different modules operate with different characteristics of a control signal. In an embodiment, another module (“subsystem module”) may be implemented to be tested with any of a multiple characteristics of a control signal, and a register which is programmable to generate a derived control signal of a desired characteristic from an original control signal, is provided. The derived control signal is provided to test the subsystem module. According to an aspect of the invention the desired characteristic may be determined, for example, to test a path between the two modules at the same speed as at which the path would be operated in a functional mode.

Abstract translation: 在不同模块以不同控制信号的特性运行的情况下，集成电路（例如芯片单元（SOC）中的系统）中的模块（例如知识产权（IP）核心）的测试。 在一个实施例中，另一个模块（“子系统模块”）可以被实现为用控制信号的多个特性中的任何一个进行测试，以及寄存器，其被编程以从原始控制信号产生所需特性的导出控制信号 ，被提供。 提供导出的控制信号以测试子系统模块。 根据本发明的一个方面，可以确定期望的特性，例如，以与功能模式下操作路径相同的速度来测试两个模块之间的路径。