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公开(公告)号：US11269526B2
公开(公告)日：2022-03-08
申请号：US16856072
申请日：2020-04-23
Applicant: Next Silicon Ltd
Inventor： Yoav Lossin , Ron Schneider , Elad Raz , Ilan Tayari , Eyal Nagar
Abstract: A device for executing a software program by at least one computational device, comprising an interconnected computing grid, connected to the at least one computational device, comprising an interconnected memory grid comprising a plurality of memory units connected by a plurality of memory network nodes, each connected to at least one of the plurality of memory units; wherein configuring the interconnected memory comprises: identifying a bypassable memory unit; selecting a backup memory unit connected to a backup memory network node; configuring the respective memory network node connected to the bypassable memory unit to forward at least one memory access request, comprising an address in a first address range, to the backup memory network node; and configuring the backup memory network node to access the backup memory unit in response to the at least one memory access request, in addition to accessing the respective at least one memory unit connected thereto.
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公开(公告)号：US11644990B2
公开(公告)日：2023-05-09
申请号：US17588352
申请日：2022-01-31
Applicant: Next Silicon Ltd
Inventor： Yoav Lossin , Ron Schneider , Elad Raz , Ilan Tayari , Eyal Nagar
CPC classification number: G06F3/0635 , G06F3/0604 , G06F3/0683 , G06F13/4027 , G11C29/70
Abstract: A device for executing a software program by at least one computational device, comprising an interconnected computing grid, connected to the at least one computational device, comprising an interconnected memory grid comprising a plurality of memory units connected by a plurality of memory network nodes, each connected to at least one of the plurality of memory units; wherein configuring the interconnected memory comprises: identifying a bypas sable memory unit; selecting a backup memory unit connected to a backup memory network node; configuring the respective memory network node connected to the bypassable memory unit to forward at least one memory access request, comprising an address in a first address range, to the backup memory network node; and configuring the backup memory network node to access the backup memory unit in response to the at least one memory access request, in addition to accessing the respective at least one memory unit connected thereto.
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公开(公告)号：US12056376B2
公开(公告)日：2024-08-06
申请号：US18144262
申请日：2023-05-08
Applicant: Next Silicon Ltd
Inventor： Yoav Lossin , Ron Schneider , Elad Raz , Ilan Tayari , Eyal Nagar
CPC classification number: G06F3/0635 , G06F3/0604 , G06F3/0683 , G06F13/4027 , G11C29/70
Abstract: A device for executing a software program by at least one computational device, comprising an interconnected computing grid, connected to the at least one computational device, comprising an interconnected memory grid comprising a plurality of memory units connected by a plurality of memory network nodes, each connected to at least one of the plurality of memory units; wherein configuring the interconnected memory comprises: identifying a bypassable memory unit; selecting a backup memory unit connected to a backup memory network node; configuring the respective memory network node connected to the bypassable memory unit to forward at least one memory access request, comprising an address in a first address range, to the backup memory network node; and configuring the backup memory network node to access the backup memory unit in response to the at least one memory access request, in addition to accessing the respective at least one memory unit connected thereto.
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