Self-selective multi-terminal memtransistor for crossbar array circuits

    公开(公告)号:US12022667B2

    公开(公告)日:2024-06-25

    申请号:US17521347

    申请日:2021-11-08

    CPC classification number: H10B63/84 G11C13/0002 H10N70/011 H10N70/253

    Abstract: This disclosure describes a self-selective multi-terminal memtransistor suitable for use in crossbar array circuits. In particular, the memtransistor comprises a sapphire substrate that has a single-layer of polycrystalline molybdenum disulphide (MoS2) thin film formed on the surface of the substrate, wherein the MoS2 thin film comprise MoS2 grains that are oriented along terraces provided on the surface of the substrate. The memtransistor has a drain electrode and a source electrode that is formed on the MoS2 thin film such that a channel is defined in the MoS2 thin film between the drain and source electrodes, and a gate electrode formed above the channel, whereby the gate electrode is isolated from the channel by a gate dielectric layer.

    Self-Selective Multi-Terminal Memtransistor for Crossbar Array Circuits

    公开(公告)号:US20220149115A1

    公开(公告)日:2022-05-12

    申请号:US17521347

    申请日:2021-11-08

    Abstract: This disclosure describes a self-selective multi-terminal memtransistor suitable for use in crossbar array circuits. In particular, the memtransistor comprises a sapphire substrate that has a single-layer of polycrystalline molybdenum disulphide (MoS2) thin film formed on the surface of the substrate, wherein the MoS2 thin film comprise MoS2 grains that are oriented along terraces provided on the surface of the substrate. The memtransistor has a drain electrode and a source electrode that is formed on the MoS2 thin film such that a channel is defined in the MoS2 thin film between the drain and source electrodes, and a gate electrode formed above the channel, whereby the gate electrode is isolated from the channel by a gate dielectric layer.

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