公开(公告)号：US09041129B2

公开(公告)日：2015-05-26

申请号：US14087355

申请日：2013-11-22

Applicant: National Applied Research Laboratories

Inventor： Chia-Hua Ho ,  Ming-Daou Lee ,  Wen-Cheng Chiu ,  Cho-Lun Hsu

IPC: H01L29/82 ,  H01L27/24 ,  H01L27/22 ,  H01L27/105 ,  H01L45/00

CPC classification number: H01L27/2463 ,  H01L27/1052 ,  H01L27/222 ,  H01L27/2481 ,  H01L45/04 ,  H01L45/1233 ,  H01L45/1675

Abstract: A semiconductor memory storage array device comprises a first electrode layer, an oxide layer, a second electrode layer, a memory material layer and a first insulator layer. The oxide layer is disposed on the first electrode layer. The second electrode layer is disposed on the oxide layer. The memory material layer is disposed on the second electrode layer. The first insulator layer is disposed adjacent to two sidewalls of the first electrode layer, the oxide layer, the second electrode layer and the memory material layer, so to define a gap either between the first electrode layer and the oxide layer or between the second electrode layer and the oxide layer.

Abstract translation: 半导体存储器存储阵列器件包括第一电极层，氧化物层，第二电极层，存储材料层和第一绝缘体层。 氧化物层设置在第一电极层上。 第二电极层设置在氧化物层上。 存储材料层设置在第二电极层上。 第一绝缘体层邻近第一电极层，氧化物层，第二电极层和存储材料层的两个侧壁设置，以便在第一电极层和氧化物层之间或第二电极之间限定间隙 层和氧化物层。