公开(公告)号：US20230128862A1

公开(公告)日：2023-04-27

申请号：US17938672

申请日：2022-10-06

申请人： NEPES CO., LTD.

发明人： Yong Tae KWON ,  Hyo Young KIM ,  Eun Yeong SON ,  Seung Ho LEE ,  Kyeung Hwan KIM ,  Jong Hyun PARK

IPC分类号： H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L23/00 ,  H10B80/00

摘要： Provided is a semiconductor package including a redistribution structure including at least one redistribution insulating layer and at least one redistribution pattern, at least one semiconductor chip located on the redistribution structure, and a molding layer located on the redistribution structure and covering the at least one semiconductor chip. The redistribution pattern includes a redistribution via passing through the redistribution insulating layer and extending in a first direction perpendicular to a top surface of the redistribution structure, and a redistribution line extending in a second direction parallel to the top surface of the redistribution structure. Inner side walls of the redistribution via have a certain inclination, and a difference between a thickness of a central portion of the redistribution line and a thickness of an edge of the redistribution line ranges from 1% to 10% of the thickness of the central portion of the redistribution line.