SYSTEMS AND METHODS FOR MAPPING MATRIX CALCULATIONS TO A MATRIX MULTIPLY ACCELERATOR

    公开(公告)号:US20210192010A1

    公开(公告)日:2021-06-24

    申请号:US17193339

    申请日:2021-03-05

    申请人: Mythic, Inc.

    IPC分类号: G06F17/16 G06N20/00

    摘要: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.

    Systems and methods for mapping matrix calculations to a matrix multiply accelerator

    公开(公告)号:US10452745B2

    公开(公告)日:2019-10-22

    申请号:US16392979

    申请日:2019-04-24

    申请人: Mythic, Inc.

    IPC分类号: G06F17/16 G06N20/00

    摘要: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.

    SYSTEMS AND METHODS FOR MAPPING MATRIX CALCULATIONS TO A MATRIX MULTIPLY ACCELERATOR

    公开(公告)号:US20190188241A1

    公开(公告)日:2019-06-20

    申请号:US16222277

    申请日:2018-12-17

    申请人: Mythic, Inc.

    IPC分类号: G06F17/16 G06N20/00

    CPC分类号: G06F17/16 G06N20/00

    摘要: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.

    SYSTEMS AND METHODS FOR MAPPING MATRIX CALCULATIONS TO A MATRIX MULTIPLY ACCELERATOR

    公开(公告)号:US20230222174A1

    公开(公告)日:2023-07-13

    申请号:US18122701

    申请日:2023-03-16

    申请人: Mythic, Inc.

    IPC分类号: G06F17/16 G06N20/00

    CPC分类号: G06F17/16 G06N20/00

    摘要: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.

    Systems and methods for mapping matrix calculations to a matrix multiply accelerator

    公开(公告)号:US10977339B2

    公开(公告)日:2021-04-13

    申请号:US16683515

    申请日:2019-11-14

    申请人: Mythic, Inc.

    IPC分类号: G06F17/16 G06N20/00

    摘要: Systems and methods of configuring a fixed memory array of an integrated circuit with coefficients of one or more applications includes identifying a utilization constraint type of the fixed memory array from a plurality of distinct utilization constraint types based on computing attributes of the one or more applications; identifying at least one coefficient mapping technique from a plurality of distinct coefficient mapping techniques that addresses the utilization constraint type; configuring the fixed memory array according to the at least one coefficient mapping technique, wherein configuring the array includes at least setting within the array the coefficients of the one or more applications in an arrangement prescribed by the at least one coefficient mapping technique that optimizes a computational utilization of the fixed memory array.