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公开(公告)号：US11721490B2
公开(公告)日：2023-08-08
申请号：US17495853
申请日：2021-10-07
发明人： Yu Tsutsui , Yuta Kurosu , Daiki Fukunaga , Yuta Saito , Masahiro Wakashima
CPC分类号： H01G4/30 , C04B35/468 , H01G4/008 , H01G4/012 , H01G4/1227 , H01G13/00 , C04B2235/66
摘要： A method of manufacturing a multilayer ceramic capacitor includes printing an internal electrode pattern on a dielectric layer, forming a dielectric pattern in a region other than a region in which the internal electrode pattern is printed, laminating dielectric layers to form a multilayer body, exposing the internal electrode pattern and the dielectric pattern from a side surface of the multilayer body, removing at least a portion of the exposed dielectric pattern, and forming a dielectric gap layer on the side surface.
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公开(公告)号：US11367573B2
公开(公告)日：2022-06-21
申请号：US17131893
申请日：2020-12-23
发明人： Yu Tsutsui , Yuta Kurosu , Daiki Fukunaga , Yuta Saito , Masahiro Wakashima
摘要： A multilayer ceramic capacitor includes, in at least one of a region between an end of a first internal electrode layer which is not connected to a second external electrode and the second external electrode, and a region between an end of a second internal electrode layer which is not connected to a first external electrode and the first external electrode, in a length direction, a defect portion provided on a plane including a stacking direction and a width direction, such that the defect portion is located between the first dielectric ceramic layers in the stacking direction and is located between the second dielectric ceramic layer and the third dielectric ceramic layer in the width direction.
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公开(公告)号：US10650974B2
公开(公告)日：2020-05-12
申请号：US15916386
申请日：2018-03-09
发明人： Kohei Shimada , Akio Masunari , Yuta Saito , Shunsuke Abe , Tomoo Yuguchi
摘要： A multilayer ceramic capacitor includes a laminate with a rectangular or substantially rectangular parallelepiped shape and including dielectric layers, first internal electrode layers, and second internal electrode layers that are laminated; a first external electrode connected with the first internal electrode layers; and a second external electrode connected with the second internal electrode layers. Each of the first internal electrode layers or the second internal electrode layers has a coverage in a central portion in a W direction that is lower than a coverage within about 30.000 μm from an end portion in the W direction, and has a shifting amount in the W direction of about 0.000 μm or more and about 10.000 μm or less.
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公开(公告)号：US12119183B2
公开(公告)日：2024-10-15
申请号：US18524673
申请日：2023-11-30
发明人： Keita Kitahara , Yuta Saito , Noriyuki Ookawa , Riyousuke Akazawa , Takefumi Takahashi , Masahiro Wakashima , Yuta Kurosu , Akito Mori
CPC分类号： H01G4/2325 , H01G4/008 , H01G4/1227 , H01G4/30
摘要： A multilayer ceramic capacitor includes a multilayer body including dielectric layers and internal electrode layers alternately laminated therein, base electrode layers respectively provided on both end surfaces of the multilayer body in a length direction intersecting a lamination direction, and each connected to the internal electrode layers and each including glass and copper, and plated layers respectively provided on an outer side of the base electrode layers. A protective layer including sulfur is provided between the glass included in the base electrode layers and the plated layers.
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公开(公告)号：US12009157B2
公开(公告)日：2024-06-11
申请号：US18218300
申请日：2023-07-05
发明人： Keita Kitahara , Yuta Saito , Noriyuki Ookawa , Riyousuke Akazawa , Takefumi Takahashi , Masahiro Wakashima , Yuta Kurosu , Akito Mori
CPC分类号： H01G4/30 , H01G4/008 , H01G4/012 , H01G4/1218
摘要： In a multilayer ceramic capacitor, a positional deviation in a lamination direction between end portions in a width direction intersecting the lamination direction and a length direction, of two of internal electrode layers adjacent to each other in the lamination direction, is about 5 μm or less. A connection ratio N1/N0 at the middle portion thereof, and a connection ratio N2/N0 at the end portion thereof are about 90% or more, respectively, and a difference between N1/N0 and N2/N0 is about 10% or less.
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公开(公告)号：US11837414B2
公开(公告)日：2023-12-05
申请号：US17495854
申请日：2021-10-07
发明人： Masahiro Wakashima , Yuta Saito , Akito Mori
CPC分类号： H01G4/38 , H01G4/1227 , H01G4/2325 , H01G4/248 , H01G4/30
摘要： A multilayer ceramic capacitor package accommodating multilayer ceramic capacitors includes a carrier tape that is elongated and includes recess pockets at equal or substantially equal intervals in a longitudinal direction, a cover tape that is elongated and attached to the carrier tape to cover an opening of each of the pockets, and the multilayer ceramic capacitors respectively accommodated in the pockets. In the multilayer ceramic capacitor package, in adjacent multilayer ceramic capacitors, a difference in densities of surfaces on an opening side of the pockets is about 0% or more and about 4% or less.
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公开(公告)号：US11600446B2
公开(公告)日：2023-03-07
申请号：US17131888
申请日：2020-12-23
发明人： Yuta Kurosu , Yuta Saito , Masahiro Wakashima , Daiki Fukunaga , Yu Tsutsui
摘要： A multilayer ceramic capacitor includes a second alloy portion including one metal element provided in a greatest amount among metal elements of an internal electrode layer, and one or more metal elements among a metal group including Sn, In, Ga, Zn, Bi, Pb, Cu, Ag, Pd, Pt, Ph, Ir, Ru, Os, Fe, V, and Y is provided between a second dielectric ceramic layer and a first internal electrode layer, and between a second dielectric ceramic layer and a second internal electrode layer, respectively.
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公开(公告)号：US11508524B2
公开(公告)日：2022-11-22
申请号：US17131891
申请日：2020-12-23
发明人： Yuta Kurosu , Yuta Saito , Masahiro Wakashima , Daiki Fukunaga , Yu Tsutsui
IPC分类号： H01G4/30 , H01G4/012 , H01G4/008 , C04B35/468 , H01G4/12
摘要： In a multilayer ceramic capacitor, an intersection of an interface is defined by a second dielectric ceramic layer, a first internal electrode layer or a second internal electrode layer, and a third dielectric ceramic layer, on a plane including a length direction and a width direction, the second dielectric ceramic layer and the third dielectric ceramic layer include a near intersection region at or near the intersection, and an average particle size of dielectric particles in the near intersection region is smaller than average particle sizes of dielectric particles in the first dielectric ceramic layer, the second dielectric ceramic layer, and the third dielectric ceramic layer.
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公开(公告)号：US11373810B2
公开(公告)日：2022-06-28
申请号：US17131896
申请日：2020-12-23
发明人： Yuta Saito , Yuta Kurosu , Masahiro Wakashima , Daiki Fukunaga , Yu Tsutsui
摘要： In a multilayer ceramic capacitor, a first segregation defined by at least one metal element selected from a group consisting of Mg, Mn, and Si is present at each of an end in a length direction of a first internal electrode layer not connected to a second external electrode and an end in a length direction of a second internal electrode layer not connected to a first external electrode. A second segregation defined by at least one metal element selected from a group consisting of Mg, Mn, and Si is present at each of an end of the first internal electrode layer in a width direction and an end of the second internal electrode layer in the width direction.
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公开(公告)号：US11270845B2
公开(公告)日：2022-03-08
申请号：US16988754
申请日：2020-08-10
发明人： Yuta Saito , Akito Mori , Takefumi Takahashi , Masahiro Wakashima
摘要： A multilayer ceramic capacitor includes a laminate including dielectric layers and internal electrode layers laminated together in a lamination direction, and a pair of external electrodes on both end surfaces of the laminate, the external electrodes being connected to the internal electrode layers, wherein a barrier is provided on a widthwise end of at least one internal electrode layer, the barrier having a thickness that decreases from the widthwise end of the internal electrode layer toward a side margin in a width direction, a void is defined by the widthwise end of the internal electrode layer, the barrier, and the side margin, and the barrier contains Ni and Sn.
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