POWER SEMICONDUCTOR MODULE AND POWER CONVERSION APPARATUS

    公开(公告)号:US20210082778A1

    公开(公告)日:2021-03-18

    申请号:US17046303

    申请日:2018-12-06

    摘要: A power semiconductor module includes an insulating substrate, a first conductive circuit pattern, a second conductive circuit pattern, a first semiconductor device, a second semiconductor device, a sealing member, and a first barrier layer. The sealing member seals the first semiconductor device, the second semiconductor device, the first conductive circuit pattern, and the second conductive circuit pattern. At least one of the first barrier layer and the sealing member includes a first stress relaxation portion. This configuration improves the reliability of the power semiconductor module.

    SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND POWER CONVERSION DEVICE

    公开(公告)号:US20210391299A1

    公开(公告)日:2021-12-16

    申请号:US17283545

    申请日:2018-12-27

    摘要: The semiconductor device includes: an insulating substrate having metal layers provided at a front surface and a back surface; a semiconductor element having a lower surface joined onto the metal layer on a front surface side, and having an electrode on an upper surface; a base plate; a case member; a terminal member; a wiring member that connects the terminal member and the semiconductor element; a metal thin film member that continuously covers a surface of the terminal member and a surface of the electrode connected by the wiring member, and a surface of the wiring member; and a filling member that covers a surface of the metal thin film member and the insulating substrate exposed from the metal thin film member, and is filled in a region surrounded by the base plate and the case member.

    SEMICONDUCTOR DEVICE AND POWER CONVERTER
    4.
    发明申请

    公开(公告)号:US20200335411A1

    公开(公告)日:2020-10-22

    申请号:US16960756

    申请日:2018-12-03

    摘要: A semiconductor device includes: a circuit member including a planar portion; a terminal portion formed above the front surface of the planar portion of the circuit member and parallel to the planar portion; a semiconductor element which has an upper surface located below an upper surface of the terminal portion and is formed on the front surface of the planar portion of the circuit member; a resin layer arranged on the semiconductor element and having first openings through which the semiconductor element is exposed; a conductive layer arranged on the resin layer, including an upper surface located above the upper surface of the terminal portion, and joined to the semiconductor element through the first openings; and a sealing member including an upper surface parallel to the planar portion and integrally sealing the circuit member, the semiconductor element, the resin layer, the conductive layer, and part of the terminal portion.