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公开(公告)号：US12189832B2
公开(公告)日：2025-01-07
申请号：US17396531
申请日：2021-08-06
Applicant: Micron Technology, Inc.
Inventor： Aaron P. Boehm , Lance W. Dover , Steffen Buch
Abstract: Data associated with a memory device may be authenticated before an associated operation is executed. The data may be authenticated before it is executed at a volatile memory. The data may be associated with a hash (e.g., a first hash) and may be communicated from the memory device to a host device. At the host device, the data and the first hash may be written (e.g., stored) to temporary storage, such as a cache. Once stored to the cache, the host device may generate an additional hash (e.g., a second hash) related to the data using a key inaccessible to the memory device. If the first hash and second hash match, the data may be authenticated and one or more operations may be executed.
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公开(公告)号：US12165740B2
公开(公告)日：2024-12-10
申请号：US17821413
申请日：2022-08-22
Applicant: Micron Technology, Inc.
Inventor： Aaron P. Boehm , Scott E. Schaefer , Scott D. Van De Graaff , Mark D. Ingram , Todd Jackson Plum
Abstract: Methods, systems, and devices for memory traffic monitoring are described. The monitoring may include traffic monitoring of access operations performed at various components of the memory device, or may include sensors that may measure parameters of components of the memory device to detect wear. The traffic monitoring or the parameters measured by the sensors may be represented by a characteristic related to an operational bias of circuits of the memory device. The memory device may use the characteristic (e.g., along with a threshold) to determine whether to adjust a parameter associated with performing access operations received by the memory device, in order to implement a corrective action.
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公开(公告)号：US12066927B2
公开(公告)日：2024-08-20
申请号：US18093762
申请日：2023-01-05
Applicant: Micron Technology, Inc.
Inventor： Aaron P. Boehm , Todd Jackson Plum , Mark D. Ingram , Scott E. Schaefer , Scott D. Van De Graaff
CPC classification number: G06F12/023 , G06F11/3495 , G06F2212/7211
Abstract: Methods, systems, and devices for adaptive user defined health indications are described. A host device may be configured to dynamically indicate adaptive health flags for monitoring health and wear information for a memory device. The host device may indicate, to a memory device, a first index. The first index may correspond to a first level of wear of a set of multiple indexed levels of wear for the memory device. The memory device may determine that a metric of the memory device satisfies the first level of wear and indicate, to the host device, that the first level of wear is satisfied. The host device may receive the indication that the first level of wear is satisfied and indicate, to the memory device, a second level of wear of the set of indexed levels of wear that is different than the first level of wear.
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公开(公告)号：US12001707B2
公开(公告)日：2024-06-04
申请号：US17396529
申请日：2021-08-06
Applicant: Micron Technology, Inc.
Inventor： Aaron P. Boehm , Steffen Buch , Lance W. Dover
IPC: G06F3/06
CPC classification number: G06F3/0655 , G06F3/0623 , G06F3/0679
Abstract: Methods, systems, and devices for host verification for a memory device are described. A memory device may receive a first value from a host device that is associated with an identification of the host device after an event. The memory device may transmit a second value to the host device that is based on the first value and comprises a random set of bits. The memory device may receive from the host device data or a command that comprises an encrypted third value that is based at least in part on the second value and a secret shared between the host device and the memory device. The memory device may also enable a functionality of the memory device based on the encrypted third value.
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公开(公告)号：US11966602B2
公开(公告)日：2024-04-23
申请号：US18100825
申请日：2023-01-24
Applicant: Micron Technology, Inc.
Inventor： Scott E. Schaefer , Aaron P. Boehm
IPC: G06F3/06
CPC classification number: G06F3/0632 , G06F3/0604 , G06F3/0655 , G06F3/0679
Abstract: Methods, systems, and devices for refresh counters in a memory system are described. In some examples, a memory device may include two or more counters configured to increment a respective count based on refresh operations performed on a memory array. A comparison may be made between two or more of the respective counts, which may include determining a difference between the respective counts or a difference in rate of incrementing. A memory device may transmit an indication to a host device based on determining a difference between counters, and the memory device, the host device, or both, may perform various operations or enter various operational modes based on the determined difference.
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Patent Agency Ranking
公开(公告)号：US11922063B2
公开(公告)日：2024-03-05
申请号：US17470594
申请日：2021-09-09
Applicant: Micron Technology, Inc.
Inventor： Scott E. Schaefer , Aaron P. Boehm
CPC classification number: G06F3/0659 , G06F3/0607 , G06F3/0658 , G06F3/0688 , G06F9/30196
Abstract: Methods, systems, and devices for performing memory command verification are described. A system may include a memory device and a memory controller, which may be external (e.g., a host device). The memory device may receive, from the memory controller, a command indicating a type of operation and an address. The memory device may decode the command and execute an operation (e.g., the operation corresponding to the decoded command) at an execution location on the memory device. The system (e.g., the memory device or the memory controller) may determine whether the executed operation and execution location match the type of operation and address indicated in the command, and the system may thereby determine an error associated with the decoding, the execution, or both of the command.
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公开(公告)号：US20230393935A1
公开(公告)日：2023-12-07
申请号：US17807813
申请日：2022-06-20
Applicant: Micron Technology, Inc.
Inventor： Scott E. Schaefer , Aaron P. Boehm , Scott D. Van De Graaff , Mark D. Ingram , Todd Jackson Plum
CPC classification number: G06F11/1068 , G06F11/0772 , G06F9/30189 , G06F11/3051
Abstract: Methods, systems, and devices for evaluation of memory device health monitoring logic are described. For example, a memory device may include health monitoring logic operable to activate certain internal health monitors of a set of multiple monitors and to communicate an output associated with the activated monitors. In a first mode of operation, the health monitoring logic may provide a single output that is generated from multiple outputs of the set of monitors. In a second mode of operation, the health monitoring logic may cycle through certain monitors (e.g., in a test mode), and may generate an output corresponding to respective active monitors as it cycles through the set of monitors. The health monitoring logic may communicate an output specific to each monitor to a host device such that the host device may evaluate an output from each monitor of the set of monitors.
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公开(公告)号：US20230315599A1
公开(公告)日：2023-10-05
申请号：US18156594
申请日：2023-01-19
Applicant: Micron Technology, Inc.
Inventor： Scott E. Schaefer , Aaron P. Boehm , Todd Jackson Plum , Mark D. Ingram , Scott D. Van De Graaff
CPC classification number: G06F11/27 , G06F11/0772 , G06F11/3037
Abstract: Methods, systems, and devices for evaluation of memory device health monitoring logic are described. A memory device may include health monitoring logic that is operable to be enabled in a configuration that corresponds to an output, such as an expected output, regardless of a degradation level of the memory device. Such a configuration may be enabled in a mode, such as a test mode, during which the memory device, or a host device coupled with the memory device, or some combination, may evaluate a difference between the output and an actual output of the health monitoring logic. The actual output being the same as the output may provide an indication that at least a portion of the health monitoring logic is functioning properly, and the actual output being different than the output may provide an indication that at least a portion of the health monitoring logic is not functioning properly.
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公开(公告)号：US20230205873A1
公开(公告)日：2023-06-29
申请号：US17653264
申请日：2022-03-02
Applicant: Micron Technology, Inc.
Inventor： Aaron P. Boehm , David Hulton , Jeremy Chritz , Tamara Schmitz , Max S. Vohra
CPC classification number: G06F21/554 , G06N20/00 , G06F3/0655 , G06F3/0604 , G06F3/0673 , G06F2221/034 , G06F9/4411
Abstract: Methods, systems, and devices for training procedure change determination to detect an attack are described. A host device may perform one or more training procedures to train aspects of a memory device (e.g., a dynamic random-access memory (DRAM) component). A training procedure may depend on a current (e.g., present, within a threshold duration) metric associated with the memory device, such as a current channel metric for a channel between the memory device and the host device. The host device, memory device, or another device, may store a set of reference values associated with a training procedure and may compare a result of a training procedure to a reference value of the set to determine whether the training procedure has changed. If the training procedure or a related value has changed, the memory device may disable one or more features of the memory device to protect against a potential attack.
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公开(公告)号：US20220237081A1
公开(公告)日：2022-07-28
申请号：US17721462
申请日：2022-04-15
Applicant: Micron Technology, Inc.
Inventor： Scott E. Schaefer , Aaron P. Boehm
Abstract: Methods, systems, and devices for a memory device with status feedback for error correction are described. For example, during a read operation, a memory device may perform an error correction operation on first data read from a memory array of the memory device. The error correction operation may generate second data and an indicator of a state of error corresponding to the second data. In one example, the indicator may indicate one of multiple possible states of error. In another example, the indicator may indicate a corrected error or no detectable error. The memory device may output the first or second data and the indicator of the state of error during a same burst interval. The memory device may output the data on a first channel and the indicator of the state of error on a second channel.
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