公开(公告)号：US6040022A

公开(公告)日：2000-03-21

申请号：US59734

申请日：1998-04-14

Applicant: Mei Chang ,  David N. K. Wang ,  John M. White ,  Dan Maydan

Inventor： Mei Chang ,  David N. K. Wang ,  John M. White ,  Dan Maydan

IPC: C23C16/50 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  C23C16/509 ,  B05D3/06 ,  C23C16/30

CPC classification number: C23C16/45565 ,  C23C16/345 ,  C23C16/455 ,  C23C16/5096

Abstract: An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film, and is also useful for forming other dielectrics such as silicon oxide and silicon oxynitride. In particular, silicon oxynitride films are characterized by low hydrogen content and by compositional uniformity.

Abstract translation: 用于真空沉积室的入口气体歧管包括入口孔，其直径或横截面横向于气体流动方向增加。 孔径构造增加了解离气体如氮气，从而增加了由氮气化学提供的氮化硅沉积速率，而不需要使用诸如氨的反应物。 虽然如果需要，可以在沉积气体化学中使用氨，该方法提供完全消除氨的选择。 包含增加直径的气体入口孔的入口歧管提供对工艺和沉积膜的增强的控制，并且还可用于形成其它电介质，例如氧化硅和氮氧化硅。 特别地，氧氮化硅膜的特征在于低氢含量和组成均匀性。

公开(公告)号：US5773100A

公开(公告)日：1998-06-30

申请号：US746178

申请日：1996-11-06

Applicant: Mei Chang ,  David N. K. Wang ,  John M. White ,  Dan Maydan

Inventor： Mei Chang ,  David N. K. Wang ,  John M. White ,  Dan Maydan

IPC: C23C16/50 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  C23C16/509 ,  B05D3/06

CPC classification number: C23C16/45565 ,  C23C16/345 ,  C23C16/455 ,  C23C16/5096

Abstract: An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film.

Abstract translation: 用于真空沉积室的入口气体歧管包括入口孔，其直径或横截面横向于气体流动方向增加。 孔径构造增加了解离气体如氮气，从而增加了由氮气化学提供的氮化硅沉积速率，而不需要使用诸如氨的反应物。 虽然如果需要，可以在沉积气体化学中使用氨，该方法提供完全消除氨的选择。 包含增加直径的气体入口孔的入口歧管提供对过程和沉积膜的增强的控制。

公开(公告)号：US4854263A

公开(公告)日：1989-08-08

申请号：US85424

申请日：1987-08-14

Applicant: Mei Chang ,  David N. K. Wang ,  John M. White ,  Dan Maydan

Inventor： Mei Chang ,  David N. K. Wang ,  John M. White ,  Dan Maydan

IPC: C23C16/50 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  C23C16/509

CPC classification number: C23C16/45565 ,  C23C16/345 ,  C23C16/455 ,  C23C16/5096

Abstract: An inlet gas manifold for a vacuum deposition chamber incorporates inlet apertures which increase in diameter or cross-section transverse to the direction of gas flow. The aperture configuration increases the dissociation gases such as nitrogen and, thus increases the rate of silicon nitride deposition provided by nitrogen gas chemistry, without requiring the use of reactants such as ammonia. While one could use ammonia in the deposition gas chemistry if desired, the process provides the option of completely eliminating ammonia. The inlet manifold containing the increasing-diameter gas inlet holes provides enhanced control of the process and the deposited film, and is also useful for forming other dielectrics such as silicon oxide and silicon oxynitride. In particular, silicon oxynitride films are characterized by low hydrogen content and by compositional uniformity.

公开(公告)号：US5354715A

公开(公告)日：1994-10-11

申请号：US861719

申请日：1992-04-01

Applicant: David N-K. Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

Inventor： David N-K. Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

IPC: C23C16/48 ,  C23C16/04 ,  C23C16/40 ,  C23C16/42 ,  C23C16/44 ,  C23C16/455 ,  C23C16/46 ,  C23C16/50 ,  C23C16/509 ,  C23C16/54 ,  C23F4/00 ,  C30B25/14 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/314 ,  H01L21/316 ,  H01L21/683 ,  H01L21/00 ,  H01L21/02

CPC classification number: C23C16/45565 ,  C23C16/402 ,  C23C16/455 ,  C23C16/45521 ,  C23C16/5096 ,  C23C16/54 ,  H01J37/32082 ,  H01J37/3244 ,  H01L21/31604

Abstract: A high pressure, high throughout, single wafer semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature process for forming a highly conformal layer of silicon dioxide from a plasma of TEOS, oxygen and ozone is also disclosed. This layer can be planarized using an etchback process. Silicon oxide deposition and etchback can be carried out sequentially in the reactor.

Abstract translation: 公开了一种高压，高整体的单晶片半导体处理反应器，其能够通过溅射单独地或作为部分的，通过溅射进行热CVD，等离子体增强CVD，等离子体辅助回蚀，等离子体自清洁和沉积形貌修饰， 原位多步处理。 该反应器在包括非常高的压力的宽范围的压力下提供均匀的加工。 还公开了一种用于从TEOS，氧气和臭氧的等离子体形成高度保形二氧化硅层的低温工艺。 该层可以使用回蚀工艺进行平面化。 氧化硅沉积和回蚀可以在反应器中顺序进行。

公开(公告)号：US4842683A

公开(公告)日：1989-06-27

申请号：US185215

申请日：1988-04-25

Applicant: David Cheng ,  Dan Maydan ,  Sasson Somekh ,  Kenneth R. Stalder ,  Dana L. Andrews ,  Mei Chang ,  John M. White ,  Jerry Y. K. Wong ,  Vladimir J. Zeitlin ,  David N. Wang

Inventor： David Cheng ,  Dan Maydan ,  Sasson Somekh ,  Kenneth R. Stalder ,  Dana L. Andrews ,  Mei Chang ,  John M. White ,  Jerry Y. K. Wong ,  Vladimir J. Zeitlin ,  David N. Wang

IPC: H05H1/46 ,  B01J3/02 ,  H01J37/32 ,  H01L21/00 ,  H01L21/302 ,  H01L21/3065

CPC classification number: H01L21/67069 ,  H01J37/32431 ,  H01J37/32477 ,  H01J37/32623 ,  H01J37/32743 ,  H01J37/32788 ,  H01J37/32862

Abstract: A magnetic field enhanced single wafer plasma etch reactor is disclosed. The features of the reactor include an electrically-controlled stepped magnetic field for providing high rate uniform etching at high pressures; temperature controlled reactor surfaces including heated anode surfaces (walls and gas manifold) and a cooled wafer supporting cathode; and a unitary wafer exchange mechanism comprising wafer lift pins which extend through the pedestal and a wafer clamp ring. The lift pins and clamp ring are moved vertically by a one-axis lift mechanism to accept the wafer from a cooperating external robot blade, clamp the wafer to the pedestal and return the wafer to the blade. The electrode cooling combines water cooling for the body of the electrode and a thermal conductivity-enhancing gas parallel-bowed interface between the wafer and electrode for keeping the wafer surface cooled despite the high power densities applied to the electrode. A gas feed-through device applies the cooling gas to the RF powered electrode without breakdown of the gas. Protective coatings/layers of materials such as quartz are provided for surfaces such as the clamp ring and gas manifold. The combination of these features provides a wide pressure regime, high etch rate, high throughput single wafer etcher which provides uniformity, directionality and selectivity at high gas pressures, operates cleanly and incorporates in-situ self-cleaning capability.

Abstract translation: 公开了一种磁场增强型单晶片等离子体蚀刻反应器。 反应器的特征包括用于在高压下提供高速均匀蚀刻的电控步进磁场; 温度控制的反应器表面包括加热的阳极表面（壁和气体歧管）和冷却的晶片支撑阴极; 以及包括延伸穿过基座的晶片提升销和晶片夹紧环的整体晶片交换机构。 提升销和夹紧环通过单轴提升机构垂直移动，以从配合的外部机器人刀片接收晶片，将晶片夹紧到基座并将晶片返回到刀片。 电极冷却结合了用于电极体的水冷却和晶片和电极之间的热导率增强气体平行弓形界面，用于保持晶片表面冷却，尽管施加到电极的高功率密度。 气体馈通装置将冷却气体施加到RF供电的电极，而不会破坏气体。 为诸如夹紧环和气体歧管的表面提供保护涂层/诸如石英的材料层。 这些特征的组合提供了广泛的压力方案，高蚀刻速率，高通量单晶硅蚀刻器，其在高气体压力下提供均匀性，方向性和选择性，干净地操作并且并入现场自清洁能力。

公开(公告)号：US5215619A

公开(公告)日：1993-06-01

申请号：US760848

申请日：1991-09-17

Applicant: David Cheng ,  Dan Maydan ,  Sasson Somekh ,  Kenneth R. Stalder ,  Dana L. Andrews ,  Mei Chang ,  John M. White ,  Jerry Y. K. Wong ,  Vladimir J. Zeitlin ,  David N. Wang

Inventor： David Cheng ,  Dan Maydan ,  Sasson Somekh ,  Kenneth R. Stalder ,  Dana L. Andrews ,  Mei Chang ,  John M. White ,  Jerry Y. K. Wong ,  Vladimir J. Zeitlin ,  David N. Wang

IPC: H01J37/32 ,  H01L21/00

CPC classification number: H01L21/67069 ,  H01J37/32477 ,  H01J37/32623 ,  H01J37/32743 ,  H01J37/32862

Abstract: A magnetic field enhanced single wafer plasma etch reactor is disclosed. The features of the reactor include an electrically-controlled stepped magnetic field for providing high rate uniform etching at high pressures; temperature controlled reactor surfaces including heated anode surfaces (walls and gas manifold) and a cooled wafer supporting cathode; and a unitary wafer exchange mechanism comprising wafer lift pins which extend through the pedestal and a wafer clamp ring. The lift pins and clamp ring are moved vertically by a one-axis lift mechanism to accept the wafer from a cooperating external robot blade, clamp the wafer to the pedestal and return the wafer to the blade. The electrode cooling combines water cooling for the body of the electrode and a thermal conductivity-enhancing gas parallel-bowed interface between the wafer and electrode for keeping the wafer surface cooled despite the high power densities applied to the electrode. A gas feed-through device applies the cooling gas to the RF powered electrode without breakdown of the gas. Protective coatings/layers of materials such as quartz are provided for surfaces such as the clamp ring and gas manifold. The combination of these features provides a wide pressure regime, high etch rate, high throughput single wafer etcher which provides uniformity, directionality and selectivity at high gas pressures, operates cleanly and incorporates in-situ self-cleaning capability.

Abstract translation: 公开了一种磁场增强型单晶片等离子体蚀刻反应器。 反应器的特征包括用于在高压下提供高速均匀蚀刻的电控步进磁场; 温度控制的反应器表面包括加热的阳极表面（壁和气体歧管）和冷却的晶片支撑阴极; 以及包括延伸穿过基座的晶片提升销和晶片夹紧环的整体晶片交换机构。 提升销和夹紧环通过单轴提升机构垂直移动，以从协作的外部机器人刀片接收晶片，将晶片夹紧到基座并将晶片返回到刀片。 电极冷却结合了用于电极体的水冷却和晶片和电极之间的热导率增强气体平行弓形界面，用于保持晶片表面冷却，尽管施加到电极的高功率密度。 气体馈通装置将冷却气体施加到RF供电的电极，而不会破坏气体。 为诸如夹紧环和气体歧管的表面提供保护涂层/诸如石英的材料层。 这些特征的组合提供了广泛的压力方案，高蚀刻速率，高通量单晶硅蚀刻器，其在高气体压力下提供均匀性，方向性和选择性，干净地操作并且并入现场自清洁能力。

公开(公告)号：US07087179B2

公开(公告)日：2006-08-08

申请号：US09734950

申请日：2000-12-11

Applicant: Cecilia Y. Mak ,  John M. White ,  Kam S. Law ,  Dan Maydan

Inventor： Cecilia Y. Mak ,  John M. White ,  Kam S. Law ,  Dan Maydan

IPC: B29D11/00

CPC classification number: G02B6/12004 ,  G02B6/13 ,  G02B6/132

Abstract: In one aspect, the invention provides methods and apparatus for forming optical devices on large area substrates. The large area substrates are preferably made of quartz, silica or fused silica. The large area substrates enable larger optical devices to be formed on a single die. In another aspect, the invention provides methods and apparatus for forming integrated optical devices on large area substrates, such as quartz, silica or fused silica substrates. In another aspect, the invention provides methods and apparatus for forming optical devices using damascene techniques on large area substrates or silicon substrates. In another aspect, methods for forming optical devices by bonding an upper cladding layer on a lower cladding and a core is provided.

Abstract translation: 一方面，本发明提供了用于在大面积基板上形成光学装置的方法和装置。 大面积基板优选由石英，二氧化硅或熔融二氧化硅制成。 大面积基板使得能够在单个管芯上形成更大的光学器件。 另一方面，本发明提供了用于在大面积衬底（例如石英，二氧化硅或熔融二氧化硅衬底）上形成集成光学器件的方法和装置。 在另一方面，本发明提供了使用大面积衬底或硅衬底上的镶嵌技术形成光学器件的方法和装置。 在另一方面，提供了通过将下包层和芯上的上包层结合来形成光器件的方法。

公开(公告)号：USRE36623E

公开(公告)日：2000-03-21

申请号：US752972

申请日：1996-12-02

Applicant: David Nin-Kou Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

Inventor： David Nin-Kou Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

IPC: C23C16/40 ,  C23C16/44 ,  C23C16/455 ,  C23C16/509 ,  C23C16/54 ,  H01L21/314 ,  H01L21/316 ,  H05H1/24

CPC classification number: C23C16/45565 ,  C23C16/402 ,  C23C16/455 ,  C23C16/45521 ,  C23C16/5096 ,  C23C16/54 ,  H01J37/32082 ,  H01J37/3244 ,  H01L21/31604

Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surface. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the sane reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

公开(公告)号：US5362526A

公开(公告)日：1994-11-08

申请号：US645999

申请日：1991-01-23

Applicant: David N. Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

Inventor： David N. Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

IPC: C23C16/48 ,  C23C16/04 ,  C23C16/40 ,  C23C16/42 ,  C23C16/44 ,  C23C16/455 ,  C23C16/46 ,  C23C16/50 ,  C23C16/509 ,  C23C16/54 ,  C23F4/00 ,  C30B25/14 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/314 ,  H01L21/316 ,  H01L21/683 ,  B05D3/06

CPC classification number: C23C16/45565 ,  C23C16/402 ,  C23C16/455 ,  C23C16/45521 ,  C23C16/5096 ,  C23C16/54 ,  H01J37/32082 ,  H01J37/3244 ,  H01L21/31604

Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

公开(公告)号：US5000113A

公开(公告)日：1991-03-19

申请号：US944492

申请日：1986-12-19

Applicant: David N. Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

Inventor： David N. Wang ,  John M. White ,  Kam S. Law ,  Cissy Leung ,  Salvador P. Umotoy ,  Kenneth S. Collins ,  John A. Adamik ,  Ilya Perlov ,  Dan Maydan

IPC: C23C16/48 ,  C23C16/04 ,  C23C16/40 ,  C23C16/42 ,  C23C16/44 ,  C23C16/455 ,  C23C16/46 ,  C23C16/50 ,  C23C16/509 ,  C23C16/54 ,  C23F4/00 ,  C30B25/14 ,  H01L21/205 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/31 ,  H01L21/314 ,  H01L21/316 ,  H01L21/683

CPC classification number: C23C16/45565 ,  C23C16/402 ,  C23C16/455 ,  C23C16/45521 ,  C23C16/5096 ,  C23C16/54 ,  H01J37/32082 ,  H01J37/3244 ,  H01L21/31604

Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures.