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公开(公告)号:US10551868B2
公开(公告)日:2020-02-04
申请号:US15440884
申请日:2017-02-23
Applicant: MediaTek Inc.
Inventor: Hung-Lin Chou , Chih-Yung Chiu , Yu-Chung Chang , Chieh-Yuan Hsu
Abstract: A multiprocessor system includes a first set of processors and a second set of processors. The first set of processors include a first set of standard cells and is configured to operate in a first frequency range. The second set of processors include a second set of standard cells and is configured to operate in a second frequency range. The first set of processors and the second set of processors have the same register-transfer level (RTL) description. Cells in the first set of standard cells have corresponding cells in the second set of standard cells with different characteristics. The first frequency range includes one or more frequencies higher than a maximum frequency in the second frequency range. The system also includes a clock generator that provides the same frequency to the first set of processors and the second set of processors.
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2.
公开(公告)号:US20170269629A1
公开(公告)日:2017-09-21
申请号:US15440884
申请日:2017-02-23
Applicant: MediaTek Inc.
Inventor: Hung-Lin Chou , Chih-Yung Chiu , Yu-Chung Chang , Chieh-Yuan Hsu
CPC classification number: G06F1/08 , G06F1/3203 , G06F1/324 , G06F1/329 , G06F1/3293 , G06F9/505 , G06F9/5083 , Y02D10/122 , Y02D10/126 , Y02D10/24
Abstract: A multiprocessor system includes a first set of processors and a second set of processors. The first set of processors include a first set of standard cells and is configured to operate in a first frequency range. The second set of processors include a second set of standard cells and is configured to operate in a second frequency range. The first set of processors and the second set of processors have the same register-transfer level (RTL) description. Cells in the first set of standard cells have corresponding cells in the second set of standard cells with different characteristics. The first frequency range includes one or more frequencies higher than a maximum frequency in the second frequency range. The system also includes a clock generator that provides the same frequency to the first set of processors and the second set of processors.
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